2016-11-02 00:45:57 +08:00
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/* RISC-V ELF support for BFD.
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2021-01-01 06:58:58 +08:00
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Copyright (C) 2011-2021 Free Software Foundation, Inc.
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2016-11-02 00:45:57 +08:00
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Contributed by Andrew Waterman (andrew@sifive.com).
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Based on MIPS ELF support for BFD, by Ian Lance Taylor.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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/* This file holds definitions specific to the RISCV ELF ABI. Note
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that most of this is not actually implemented by BFD. */
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#ifndef _ELF_RISCV_H
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#define _ELF_RISCV_H
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#include "elf/reloc-macros.h"
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#include "libiberty.h"
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/* Relocation types. */
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START_RELOC_NUMBERS (elf_riscv_reloc_type)
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/* Relocation types used by the dynamic linker. */
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RELOC_NUMBER (R_RISCV_NONE, 0)
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RELOC_NUMBER (R_RISCV_32, 1)
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RELOC_NUMBER (R_RISCV_64, 2)
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RELOC_NUMBER (R_RISCV_RELATIVE, 3)
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RELOC_NUMBER (R_RISCV_COPY, 4)
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RELOC_NUMBER (R_RISCV_JUMP_SLOT, 5)
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RELOC_NUMBER (R_RISCV_TLS_DTPMOD32, 6)
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RELOC_NUMBER (R_RISCV_TLS_DTPMOD64, 7)
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RELOC_NUMBER (R_RISCV_TLS_DTPREL32, 8)
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RELOC_NUMBER (R_RISCV_TLS_DTPREL64, 9)
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RELOC_NUMBER (R_RISCV_TLS_TPREL32, 10)
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RELOC_NUMBER (R_RISCV_TLS_TPREL64, 11)
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/* Relocation types not used by the dynamic linker. */
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RELOC_NUMBER (R_RISCV_BRANCH, 16)
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RELOC_NUMBER (R_RISCV_JAL, 17)
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RELOC_NUMBER (R_RISCV_CALL, 18)
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RELOC_NUMBER (R_RISCV_CALL_PLT, 19)
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RELOC_NUMBER (R_RISCV_GOT_HI20, 20)
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RELOC_NUMBER (R_RISCV_TLS_GOT_HI20, 21)
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RELOC_NUMBER (R_RISCV_TLS_GD_HI20, 22)
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RELOC_NUMBER (R_RISCV_PCREL_HI20, 23)
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RELOC_NUMBER (R_RISCV_PCREL_LO12_I, 24)
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RELOC_NUMBER (R_RISCV_PCREL_LO12_S, 25)
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RELOC_NUMBER (R_RISCV_HI20, 26)
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RELOC_NUMBER (R_RISCV_LO12_I, 27)
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RELOC_NUMBER (R_RISCV_LO12_S, 28)
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RELOC_NUMBER (R_RISCV_TPREL_HI20, 29)
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RELOC_NUMBER (R_RISCV_TPREL_LO12_I, 30)
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RELOC_NUMBER (R_RISCV_TPREL_LO12_S, 31)
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RELOC_NUMBER (R_RISCV_TPREL_ADD, 32)
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RELOC_NUMBER (R_RISCV_ADD8, 33)
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RELOC_NUMBER (R_RISCV_ADD16, 34)
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RELOC_NUMBER (R_RISCV_ADD32, 35)
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RELOC_NUMBER (R_RISCV_ADD64, 36)
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RELOC_NUMBER (R_RISCV_SUB8, 37)
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RELOC_NUMBER (R_RISCV_SUB16, 38)
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RELOC_NUMBER (R_RISCV_SUB32, 39)
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RELOC_NUMBER (R_RISCV_SUB64, 40)
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RELOC_NUMBER (R_RISCV_GNU_VTINHERIT, 41)
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RELOC_NUMBER (R_RISCV_GNU_VTENTRY, 42)
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RELOC_NUMBER (R_RISCV_ALIGN, 43)
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RELOC_NUMBER (R_RISCV_RVC_BRANCH, 44)
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RELOC_NUMBER (R_RISCV_RVC_JUMP, 45)
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RELOC_NUMBER (R_RISCV_RVC_LUI, 46)
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RELOC_NUMBER (R_RISCV_GPREL_I, 47)
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RELOC_NUMBER (R_RISCV_GPREL_S, 48)
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2016-12-19 14:53:48 +08:00
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RELOC_NUMBER (R_RISCV_TPREL_I, 49)
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RELOC_NUMBER (R_RISCV_TPREL_S, 50)
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RELOC_NUMBER (R_RISCV_RELAX, 51)
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RELOC_NUMBER (R_RISCV_SUB6, 52)
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RELOC_NUMBER (R_RISCV_SET6, 53)
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RELOC_NUMBER (R_RISCV_SET8, 54)
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RELOC_NUMBER (R_RISCV_SET16, 55)
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RELOC_NUMBER (R_RISCV_SET32, 56)
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2017-06-09 02:54:14 +08:00
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RELOC_NUMBER (R_RISCV_32_PCREL, 57)
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RISC-V: Support GNU indirect functions.
Generally, glibc dynamic linker should have two ways to deal with ifunc
- one is to handle the IRELATIVE relocations for the non-preemtive ifunc
symbols, the other is to handle the R_RISCV_32/64 and R_RISCV_JUMP_SLOT
relocations with the STT_IFUNC preemtive symbols. No matter which method
is used, both of them should get the resolved ifunc symbols at runtime.
Therefore, linker needs to generate the correct dynamic relocations for
ifunc to make sure the the dynamic linker works well. For now, there are
thirteen relocations are supported for ifunc in GNU ld,
* R_RISCV_CALL and R_RISCV_CALL_PLT:
The RISC-V compiler won't generate R_RISCV_JAL directly to jump to an
ifunc. Besides, we disable the relaxations for the relocation referenced
to ifunc, so just handling the R_RISCV_CALL and R_RISCV_CALL_PLT should be
enough. Linker should generate a .plt entry and a .got.plt entry for it,
and also needs to insert a dynamic IRELATIVE in the .got.plt enrty, or
insert a R_RISCV_JUMP_SLOT when generating shared library.
* R_RISCV_PCREL_HI20 and R_RISCV_PCREL_LO12_I/S:
LA/LLA pattern with local fPIC ifunc symbol, or any non-PIC ifunc symbol.
The PC-relative relocation. The current linker will deal with them in
the same way as R_RISCV_CALL_PLT.
* R_RISCV_GOT_HI20 and R_RISCV_PCREL_LO12_I/S:
LA pattern with global PIC ifunc symbol. Linker should insert a dynamic
IRELATIVE in the .got entry, or insert a R_RISCV_32/64 when generating
shared library.
* R_RISCV_32 and R_RISCV_64:
Store the ifunc symbol into the data section. Linker should insert a
dynamic IRELATIVE in the data section, or insert a R_RISCV_32/64 when
generating shared library.
* R_RISCV_HI20 and R_RISCV_LO12_I/S:
The LUI + ADDI/LW/SW patterns. The absolute access relocation. The
medlow model without the -fPIC compiler option should generate them.
The ld ifunc testsuites "Build pr23169a" and "Build pr23169d" need the
relocations, they are in the ld/testsuite/ld-ifunc/, and need compiler
support.
However, we also made some optimizations with reference to x86,
* If GOT and PLT relocations refer to the same ifunc symbol when generating
pie, then they can actually share a .got entry without creating two entries
to store the same value and relocation.
* If GOT, PLT and DATA relocations refer to the same ifunc symbol when
generating position dependency executable, then linker will fill the address
of .plt entry into the corresponding .got entry and data section, without
insert any dynamic relocations for the GOT and DATA relocations.
For the ifunc testcases, there are three types of them,
1. ifunc-reloc-*: Only check the single type of relocation refers to
ifunc symbol.
* ifunc-reloc-call: R_RISCV_CALL and R_RISCV_CALL_PLT.
* ifunc-reloc-data: R_RISCV_32 and R_RISCV_64.
* ifunc-reloc-got: R_RISCV_GOT_HI20 and R_RISCV_PCREL_LO_I/S.
* ifunc-reloc-pcrel: R_RISCV_PCREL_HI20 and R_RISCV_PCREL_LO_I/S.
2. ifunc-[nonplt|plt]-*: If we don't have PLT relocs, then don't need to
create the PLT and it's .plt entries.
* ifunc-nonplt: Combine R_RISCV_GOT_HI20 and R_RISCV_32/64.
* ifunc-plt: Combine all ifunc relocations.
3. ifunc-seperate-*: If we link the ifunc caller and resolver into the
same module (link the objects), then the results are the same as the
ifunc-reloc-* and ifunc-[noplt|plt]-* testcases. Consider the cases that
the ifunc callers and resolver are in the different modules, that is, we
compile the ifunc resolver to the shared library first, and then link it
with the ifunc callers. The output of ifunc callers should be the same as
the normal STT_FUNC cases, and the shared ifunc resolver should define the
symbols as STT_IFUNC.
The R_RISCV_PCREL_HI20 reloc is special. It should be linked and resolved
locally, so if the ifunc resolver is defined in other modules (other shared
libraries), then the R_RISCV_PCREL_HI20 is unresolvable, and linker should
issue an unresolvable reloc error.
bfd/
* elfnn-riscv.c: Include "objalloc.h" since we need objalloc_alloc.
(riscv_elf_link_hash_table): Add loc_hash_table and loc_hash_memory
for local STT_GNU_IFUNC symbols.
(riscv_elf_got_plt_val): Removed.
(riscv_elf_local_htab_hash, riscv_elf_local_htab_eq): New functions.
Use to compare local hash entries.
(riscv_elf_get_local_sym_hash): New function. Find a hash entry for
local symbol, and create a new one if needed.
(riscv_elf_link_hash_table_free): New function. Destroy an riscv
elf linker hash table.
(riscv_elf_link_hash_table_create): Create hash table for local ifunc.
(riscv_elf_check_relocs): Create a fake global symbol to track the
local ifunc symbol. Add support to check and handle the relocations
reference to ifunc symbols.
(allocate_dynrelocs): Let allocate_ifunc_dynrelocs and
allocate_local_ifunc_dynrelocs to handle the ifunc symbols if they
are defined and referenced in a non-shared object.
(allocate_ifunc_dynrelocs): New function. Allocate space in .plt,
.got and associated reloc sections for ifunc dynamic relocs.
(allocate_local_ifunc_dynrelocs): Likewise, but for local ifunc
dynamic relocs.
(riscv_elf_relocate_section): Add support to handle the relocation
referenced to ifunc symbols.
(riscv_elf_size_dynamic_sections): Updated.
(riscv_elf_adjust_dynamic_symbol): Updated.
(riscv_elf_finish_dynamic_symbol): Finish up the ifunc handling,
including fill the PLT and GOT entries for ifunc symbols.
(riscv_elf_finish_local_dynamic_symbol): New function. Called by
riscv_elf_finish_dynamic_symbol to handle the local ifunc symbols.
(_bfd_riscv_relax_section): Don't do the relaxation for ifunc.
* elfxx-riscv.c: Add R_RISCV_IRELATIVE.
* configure.ac: Link elf-ifunc.lo to use the generic ifunc support.
* configure: Regenerated.
include/
* elf/riscv.h: Add R_RISCV_IRELATIVE to 58.
ld/
* emulparams/elf32lriscv-defs.sh: Add IREL_IN_PLT.
* testsuite/ld-ifunc/ifunc.exp: Enable ifunc tests for RISC-V.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp (run_dump_test_ifunc):
New dump test for ifunc. There are two arguments, 'target` and
`output`. The `target` is rv32 or rv64, and the `output` is used
to choose which output you want to test (exe, pie or .so).
* testsuite/ld-riscv-elf/ifunc-reloc-call-01.s: New testcase.
* testsuite/ld-riscv-elf/ifunc-reloc-call-01.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-01-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-01-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-01-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-call-02-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-data-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-got-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-reloc-pcrel-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-nonplt-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-01-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02-exe.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02-pic.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-plt-02-pie.rd: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-resolver.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-caller.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-exe.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-pic.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-pie.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-caller-pcrel.s: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pic.d: Likewise.
* testsuite/ld-riscv-elf/ifunc-seperate-pcrel-pie.d: Likewise.
2020-10-07 11:48:22 +08:00
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RELOC_NUMBER (R_RISCV_IRELATIVE, 58)
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2016-11-02 00:45:57 +08:00
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END_RELOC_NUMBERS (R_RISCV_max)
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/* Processor specific flags for the ELF header e_flags field. */
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/* File may contain compressed instructions. */
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#define EF_RISCV_RVC 0x0001
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Re-work RISC-V gas flags: now we just support -mabi and -march
We've decided to standardize on two flags for RISC-V: "-march" sets the
target architecture (which determines which instructions can be
generated), and "-mabi" sets the target ABI. We needed to rework this
because the old flag set didn't support soft-float or single-float ABIs,
and didn't support an x32-style ABI on RISC-V.
Additionally, we've changed the behavior of the -march flag: it's now a
lot stricter and only parses things we can actually understand.
Additionally, it's now lowercase-only: the rationale is that while the
RISC-V ISA manual specifies that ISA strings are case-insensitive, in
Linux-land things are usually case-sensitive. Since this flag can be
used to determine library paths, we didn't want to bake some
case-insensitivity in there that would case trouble later.
This patch implements these two new flags and removes the old flags that
could conflict with these. There wasn't a RISC-V release before, so we
want to just support a clean flag set.
include/
* elf/riscv.h (EF_RISCV_SOFT_FLOAT): Don't define.
(EF_RISCV_FLOAT_ABI, EF_RISCV_FLOAT_ABI_SOFT): Define.
(EF_RISCV_FLOAT_ABI_SINGLE, EF_RISCV_FLOAT_ABI_DOUBLE): Define.
(EF_RISCV_FLOAT_ABI_QUAD): Define.
bfd/
* elfnn-riscv.c (_bfd_riscv_elf_merge_private_bfd_data): Use
EF_RISCV_FLOAT_ABI_SOFT instead of EF_RISCV_SOFT_FLOAT.
binutils/
* readelf.c (get_machine_flags): Use
EF_RISCV_FLOAT_ABI_{SOFT,SINGLE,DOBULE,QUAD) instead of
EF_RISCV_{SOFT,HARD}_FLOAT.
gas/
* config/tc-riscv.h (xlen): Delete.
* config/tc-riscv.c (xlen): Make static.
(abi_xlen): New variable.
(options): Replace OPTION_{M32,M64,MSOFT_FLOAT,MHARD_FLOAT,MRVC}
with OPTION_MABI.
(md_longopts): Likewise.
(md_parse_option): Likewise.
(riscv_elf_final_processing): Likewise.
* doc/as.texinfo (Target RISC-V options): Likewise.
* doc/c-riscv.texi (OPTIONS): Likewise.
* config/tc-riscv.c (float_mode): Removed.
(float_abi): New type, specifies the floating-point ABI.
(riscv_set_abi): New function.
(riscv_add_subset): Only allow lower-case ISA names and require
them to start with "rv".
(riscv_after_parse_args): Likewise.
opcodes/
* riscv-dis.c (riscv_disassemble_insn): Default to the ELF's
XLEN when none is provided.
2016-12-19 14:53:50 +08:00
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/* Which floating-point ABI a file uses. */
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#define EF_RISCV_FLOAT_ABI 0x0006
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/* File uses the soft-float ABI. */
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#define EF_RISCV_FLOAT_ABI_SOFT 0x0000
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/* File uses the single-float ABI. */
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#define EF_RISCV_FLOAT_ABI_SINGLE 0x0002
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/* File uses the double-float ABI. */
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#define EF_RISCV_FLOAT_ABI_DOUBLE 0x0004
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/* File uses the quad-float ABI. */
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#define EF_RISCV_FLOAT_ABI_QUAD 0x0006
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2016-11-02 00:45:57 +08:00
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2018-05-19 05:03:18 +08:00
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/* File uses the 32E base integer instruction. */
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#define EF_RISCV_RVE 0x0008
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2017-04-04 01:08:29 +08:00
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/* The name of the global pointer symbol. */
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#define RISCV_GP_SYMBOL "__global_pointer$"
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RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC.
This is the original discussion,
https://github.com/riscv/riscv-elf-psabi-doc/pull/190
And here is the glibc part,
https://sourceware.org/pipermail/libc-alpha/2021-August/129931.html
For binutils part, we need to support a new direcitve: .variant_cc.
The function symbol marked by .variant_cc means it need to be resolved
directly without resolver for dynamic linker. We also add a new dynamic
entry, STO_RISCV_VARIANT_CC, to indicate there are symbols with the
special attribute in the dynamic symbol table of the object.
I heard that llvm already have supported this in their mainline, so
I think it's time to commit this.
bfd/
* elfnn-riscv.c (riscv_elf_link_hash_table): Added variant_cc
flag. It is used to check if relocations for variant CC symbols
may be present.
(allocate_dynrelocs): If the symbol has STO_RISCV_VARIANT_CC
flag, then raise the variant_cc flag of riscv_elf_link_hash_table.
(riscv_elf_size_dynamic_sections): Added dynamic entry for
variant_cc.
(riscv_elf_merge_symbol_attribute): New function, used to merge
non-visibility st_other attributes, including STO_RISCV_VARIANT_CC.
binutils/
* readelf.c (get_riscv_dynamic_type): New function.
(get_dynamic_type): Called get_riscv_dynamic_type for riscv targets.
(get_riscv_symbol_other): New function.
(get_symbol_other): Called get_riscv_symbol_other for riscv targets.
gas/
* config/tc-riscv.c (s_variant_cc): Marked symbol that it follows a
variant CC convention.
(riscv_elf_copy_symbol_attributes): Same as elf_copy_symbol_attributes,
but without copying st_other. If a function symbol has special st_other
value set via directives, then attaching an IFUNC resolver to that symbol
should not override the st_other setting.
(riscv_pseudo_table): Support variant_cc diretive.
* config/tc-riscv.h (OBJ_COPY_SYMBOL_ATTRIBUTES): Defined.
* testsuite/gas/riscv/variant_cc-set.d: New testcase.
* testsuite/gas/riscv/variant_cc-set.s: Likewise.
* testsuite/gas/riscv/variant_cc.d: Likewise.
* testsuite/gas/riscv/variant_cc.s: Likewise.
include/
* elf/riscv.h (DT_RISCV_VARIANT_CC): Defined to (DT_LOPROC + 1).
(STO_RISCV_VARIANT_CC): Defined to 0x80.
ld/
* testsuite/ld-riscv-elf/variant_cc-1.s: New testcase.
* testsuite/ld-riscv-elf/variant_cc-2.s: Likewise.
* testsuite/ld-riscv-elf/variant_cc-now.d: Likewise.
* testsuite/ld-riscv-elf/variant_cc-r.d: Likewise.
* testsuite/ld-riscv-elf/variant_cc-shared.d: Likewise.
* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Updated.
2021-08-11 16:26:39 +08:00
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/* Processor specific dynamic array tags. */
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#define DT_RISCV_VARIANT_CC (DT_LOPROC + 1)
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/* RISC-V specific values for st_other. */
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#define STO_RISCV_VARIANT_CC 0x80
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2019-01-17 05:14:59 +08:00
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/* Additional section types. */
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2021-01-13 10:05:48 +08:00
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#define SHT_RISCV_ATTRIBUTES 0x70000003 /* Section holds attributes. */
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2019-01-17 05:14:59 +08:00
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2021-06-29 14:36:35 +08:00
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/* Processor specific program header types. */
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/* Location of RISC-V ELF attribute section. */
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#define PT_RISCV_ATTRIBUTES 0x70000003
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2019-01-17 05:14:59 +08:00
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/* Object attributes. */
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enum
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{
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/* 0-3 are generic. */
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Tag_RISCV_stack_align = 4,
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Tag_RISCV_arch = 5,
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Tag_RISCV_unaligned_access = 6,
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Tag_RISCV_priv_spec = 8,
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Tag_RISCV_priv_spec_minor = 10,
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Tag_RISCV_priv_spec_revision = 12
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};
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2016-11-02 00:45:57 +08:00
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#endif /* _ELF_RISCV_H */
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