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binutils-gdb/sim/rx/configure.ac

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[sim] * rx: New directory. * configure.ac: Add entry for Renesas RX. * configure: Regenerate. [include/gdb] * sim-rx.h: New.
2009-11-25 03:22:45 +08:00
dnl Process this file with autoconf to produce a configure script.
Update copyright year range in all GDB files This commits the result of running gdb/copyright.py as per our Start of New Year procedure... gdb/ChangeLog Update copyright year range in copyright header of all GDB files.
2021-01-01 16:03:39 +08:00
dnl Copyright (C) 2005-2021 Free Software Foundation, Inc.
[sim] * rx: New directory. * configure.ac: Add entry for Renesas RX. * configure: Regenerate. [include/gdb] * sim-rx.h: New.
2009-11-25 03:22:45 +08:00
dnl Contributed by Red Hat, Inc.
dnl
dnl This file is part of the GNU simulators.
dnl
dnl This program is free software; you can redistribute it and/or modify
dnl it under the terms of the GNU General Public License as published by
dnl the Free Software Foundation; either version 3 of the License, or
dnl (at your option) any later version.
dnl
dnl This program is distributed in the hope that it will be useful,
dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
dnl GNU General Public License for more details.
dnl
dnl You should have received a copy of the GNU General Public License
dnl along with this program. If not, see <http://www.gnu.org/licenses/>.
dnl
AC_INIT(Makefile.in)
sim: common: split up acinclude.m4 into individual m4 files This file is quite large and is getting unmanageable. Split it apart to follow aclocal best practices by putting one-macro-per-file. There shouldn't be any real functional changes here as can be seen in the configure script regens.
2021-02-07 11:51:30 +08:00
AC_CONFIG_MACRO_DIRS([../m4 ../.. ../../config])
[sim] * rx: New directory. * configure.ac: Add entry for Renesas RX. * configure: Regenerate. [include/gdb] * sim-rx.h: New.
2009-11-25 03:22:45 +08:00
sim: rx: scope the unique configure flag This will make it possible to merge into the common configure by making sure we never collide with other arches.
2021-06-20 12:50:30 +08:00
AC_MSG_CHECKING([whether sim rx should be cycle accurate])
AC_ARG_ENABLE(sim-rx-cycle-accurate,
[AS_HELP_STRING([--disable-sim-rx-cycle-accurate],
sim: use AS_HELP_STRING everywhere This helps standardize the configure --help output.
2015-06-24 01:58:48 +08:00
[Disable cycle accurate simulation (faster runtime)])],
[sim/rx] * README.txt: New. * config.h (CYCLE_ACCURATE, CYCLE_STATS): New. * configure.in (--enable-cycle-accurate, --enable-cycle-stats): New. Default to enabled. * configure: Regenerate. * cpu.h (regs_type): Add cycle tracking info. (reset_pipeline_stats): Declare. (halt_pipeline_stats): Declare. (pipeline_stats): Declare. * main.c (done): Call pipeline_stats(). * mem.h (rx_mem_ptr): Moved to here ... * mem.c (mem_ptr): ... from here. Rename throughout. (mem_put_byte): Move LEDs to Port A. Add Port B to control cycle statistics. Move UART to SCI4. (mem_put_hi): Add TPU 1-2. TPU 1 and 2 count CPU cycles. * reg.c (init_regs): Set Rt reg to -1 (no reg). * rx.c: Add cycle counting and statistics throughout. (rx_get_byte): Optimize for speed. (decode_opcode): Likewise. (reset_pipeline_stats): New. (halt_pipeline_stats): New. (pipeline_stats): New. * trace.c (sim_disasm_one): Print cycle count. [include/opcode] * rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
2010-07-29 05:58:22 +08:00
[case "${enableval}" in
yes | no) ;;
sim: rx: scope the unique configure flag This will make it possible to merge into the common configure by making sure we never collide with other arches.
2021-06-20 12:50:30 +08:00
*) AC_MSG_ERROR(bad value ${enableval} given for --enable-sim-rx-cycle-accurate option) ;;
[sim/rx] * README.txt: New. * config.h (CYCLE_ACCURATE, CYCLE_STATS): New. * configure.in (--enable-cycle-accurate, --enable-cycle-stats): New. Default to enabled. * configure: Regenerate. * cpu.h (regs_type): Add cycle tracking info. (reset_pipeline_stats): Declare. (halt_pipeline_stats): Declare. (pipeline_stats): Declare. * main.c (done): Call pipeline_stats(). * mem.h (rx_mem_ptr): Moved to here ... * mem.c (mem_ptr): ... from here. Rename throughout. (mem_put_byte): Move LEDs to Port A. Add Port B to control cycle statistics. Move UART to SCI4. (mem_put_hi): Add TPU 1-2. TPU 1 and 2 count CPU cycles. * reg.c (init_regs): Set Rt reg to -1 (no reg). * rx.c: Add cycle counting and statistics throughout. (rx_get_byte): Optimize for speed. (decode_opcode): Likewise. (reset_pipeline_stats): New. (halt_pipeline_stats): New. (pipeline_stats): New. * trace.c (sim_disasm_one): Print cycle count. [include/opcode] * rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
2010-07-29 05:58:22 +08:00
esac])
sim: rx: scope the unique configure flag This will make it possible to merge into the common configure by making sure we never collide with other arches.
2021-06-20 12:50:30 +08:00
if test "x${enable_sim_rx_cycle_accurate}" != xno; then
sim_rx_cycle_accurate_flags="-DCYCLE_ACCURATE"
AC_MSG_RESULT([yes])
else
AC_MSG_RESULT([no])
[sim/rx] * README.txt: New. * config.h (CYCLE_ACCURATE, CYCLE_STATS): New. * configure.in (--enable-cycle-accurate, --enable-cycle-stats): New. Default to enabled. * configure: Regenerate. * cpu.h (regs_type): Add cycle tracking info. (reset_pipeline_stats): Declare. (halt_pipeline_stats): Declare. (pipeline_stats): Declare. * main.c (done): Call pipeline_stats(). * mem.h (rx_mem_ptr): Moved to here ... * mem.c (mem_ptr): ... from here. Rename throughout. (mem_put_byte): Move LEDs to Port A. Add Port B to control cycle statistics. Move UART to SCI4. (mem_put_hi): Add TPU 1-2. TPU 1 and 2 count CPU cycles. * reg.c (init_regs): Set Rt reg to -1 (no reg). * rx.c: Add cycle counting and statistics throughout. (rx_get_byte): Optimize for speed. (decode_opcode): Likewise. (reset_pipeline_stats): New. (halt_pipeline_stats): New. (pipeline_stats): New. * trace.c (sim_disasm_one): Print cycle count. [include/opcode] * rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
2010-07-29 05:58:22 +08:00
fi
sim: rx: scope the unique configure flag This will make it possible to merge into the common configure by making sure we never collide with other arches.
2021-06-20 12:50:30 +08:00
AC_SUBST(sim_rx_cycle_accurate_flags)
[sim/rx] * README.txt: New. * config.h (CYCLE_ACCURATE, CYCLE_STATS): New. * configure.in (--enable-cycle-accurate, --enable-cycle-stats): New. Default to enabled. * configure: Regenerate. * cpu.h (regs_type): Add cycle tracking info. (reset_pipeline_stats): Declare. (halt_pipeline_stats): Declare. (pipeline_stats): Declare. * main.c (done): Call pipeline_stats(). * mem.h (rx_mem_ptr): Moved to here ... * mem.c (mem_ptr): ... from here. Rename throughout. (mem_put_byte): Move LEDs to Port A. Add Port B to control cycle statistics. Move UART to SCI4. (mem_put_hi): Add TPU 1-2. TPU 1 and 2 count CPU cycles. * reg.c (init_regs): Set Rt reg to -1 (no reg). * rx.c: Add cycle counting and statistics throughout. (rx_get_byte): Optimize for speed. (decode_opcode): Likewise. (reset_pipeline_stats): New. (halt_pipeline_stats): New. (pipeline_stats): New. * trace.c (sim_disasm_one): Print cycle count. [include/opcode] * rx.h (RX_Opcode_ID): Add nop2 and nop3 for statistics.
2010-07-29 05:58:22 +08:00
[sim] * rx: New directory. * configure.ac: Add entry for Renesas RX. * configure: Regenerate. [include/gdb] * sim-rx.h: New.
2009-11-25 03:22:45 +08:00
SIM_AC_OUTPUT
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