2019-05-24 01:05:12 +08:00
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/* tc-bpf.c -- Assembler for the Linux eBPF.
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2022-01-02 06:30:17 +08:00
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Copyright (C) 2019-2022 Free Software Foundation, Inc.
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2019-05-24 01:05:12 +08:00
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Contributed by Oracle, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to
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the Free Software Foundation, 51 Franklin Street - Fifth Floor,
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Boston, MA 02110-1301, USA. */
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#include "as.h"
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#include "subsegs.h"
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#include "symcat.h"
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#include "opcodes/bpf-desc.h"
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#include "opcodes/bpf-opc.h"
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#include "cgen.h"
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#include "elf/common.h"
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#include "elf/bpf.h"
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#include "dwarf2dbg.h"
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const char comment_chars[] = ";";
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const char line_comment_chars[] = "#";
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const char line_separator_chars[] = "`";
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const char EXP_CHARS[] = "eE";
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const char FLT_CHARS[] = "fFdD";
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2019-07-19 21:35:02 +08:00
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/* Like s_lcomm_internal in gas/read.c but the alignment string
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is allowed to be optional. */
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static symbolS *
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pe_lcomm_internal (int needs_align, symbolS *symbolP, addressT size)
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{
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addressT align = 0;
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SKIP_WHITESPACE ();
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if (needs_align
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&& *input_line_pointer == ',')
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{
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align = parse_align (needs_align - 1);
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if (align == (addressT) -1)
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return NULL;
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}
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else
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{
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if (size >= 8)
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align = 3;
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else if (size >= 4)
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align = 2;
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else if (size >= 2)
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align = 1;
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else
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align = 0;
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}
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bss_alloc (symbolP, size, align);
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return symbolP;
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}
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static void
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pe_lcomm (int needs_align)
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{
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s_comm_internal (needs_align * 2, pe_lcomm_internal);
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}
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2019-05-24 01:05:12 +08:00
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/* The target specific pseudo-ops which we support. */
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const pseudo_typeS md_pseudo_table[] =
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{
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2019-07-18 04:57:23 +08:00
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{ "half", cons, 2 },
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{ "word", cons, 4 },
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{ "dword", cons, 8 },
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2019-07-19 21:35:02 +08:00
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{ "lcomm", pe_lcomm, 1 },
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2019-07-18 05:18:41 +08:00
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{ NULL, NULL, 0 }
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2019-05-24 01:05:12 +08:00
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};
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2019-07-19 21:35:02 +08:00
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2019-05-24 01:05:12 +08:00
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/* ISA handling. */
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static CGEN_BITSET *bpf_isa;
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/* Command-line options processing. */
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enum options
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{
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OPTION_LITTLE_ENDIAN = OPTION_MD_BASE,
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bpf: add xBPF ISA
This patch adds support for xBPF, another ISA targetting the BPF
virtual architecture. For now, the primary difference between eBPF
and xBPF is that xBPF supports indirect calls through the
'call %reg' form of the call instruction.
bfd/
* archures.c (bfd_mach_xbpf): Define.
* bfd-in2.h: Regenerate.
* cpu-bpf.c (bfd_xbpf_arch) New.
(bfd_bpf_arch) Update next in list field to point to xbpf arch.
cpu/
* bpf.cpu (arch bpf): Add xbpf mach and isas.
(define-xbpf-isa) New pmacro.
(all-isas) Add xbpfle,xbpfbe.
(endian-isas): New pmacro.
(mach xbpf): New.
(model xbpf-def): Likewise.
(h-gpr): Add xbpf mach.
(f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
(f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
(define-alu-insn-un): Use new endian-isas pmacro.
(define-alu-insn-bin, define-alu-insn-mov): Likewise.
(define-endian-insn, define-lddw): Likewise.
(dlind, dxli, dxsi, dsti): Likewise.
(define-cond-jump-insn, define-call-insn): Likewise.
(define-atomic-insns): Likewise.
gas/
* config/tc-bpf.c: Add option -mxbpf to select xbpf isa.
* testsuite/gas/bpf/indcall-1.d: New file.
* testsuite/gas/bpf/indcall-1.s: Likewise.
* testsuite/gas/bpf/indcall-bad-1.l: Likewise.
* testsuite/gas/bpf/indcall-bad-1.s: Likewise.
* testsuite/gas/bpf/bpf.exp: Run new tests.
opcodes/
* bpf-desc.c: Regenerate.
* bpf-desc.h: Likewise.
* bpf-opc.c: Likewise.
* bpf-opc.h: Likewise.
* disassemble.c (disassemble_init_for_target): Set bits for xBPF
ISA when appropriate.
2020-08-26 21:39:00 +08:00
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OPTION_BIG_ENDIAN,
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OPTION_XBPF
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2019-05-24 01:05:12 +08:00
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};
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struct option md_longopts[] =
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{
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{ "EL", no_argument, NULL, OPTION_LITTLE_ENDIAN },
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{ "EB", no_argument, NULL, OPTION_BIG_ENDIAN },
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bpf: add xBPF ISA
This patch adds support for xBPF, another ISA targetting the BPF
virtual architecture. For now, the primary difference between eBPF
and xBPF is that xBPF supports indirect calls through the
'call %reg' form of the call instruction.
bfd/
* archures.c (bfd_mach_xbpf): Define.
* bfd-in2.h: Regenerate.
* cpu-bpf.c (bfd_xbpf_arch) New.
(bfd_bpf_arch) Update next in list field to point to xbpf arch.
cpu/
* bpf.cpu (arch bpf): Add xbpf mach and isas.
(define-xbpf-isa) New pmacro.
(all-isas) Add xbpfle,xbpfbe.
(endian-isas): New pmacro.
(mach xbpf): New.
(model xbpf-def): Likewise.
(h-gpr): Add xbpf mach.
(f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
(f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
(define-alu-insn-un): Use new endian-isas pmacro.
(define-alu-insn-bin, define-alu-insn-mov): Likewise.
(define-endian-insn, define-lddw): Likewise.
(dlind, dxli, dxsi, dsti): Likewise.
(define-cond-jump-insn, define-call-insn): Likewise.
(define-atomic-insns): Likewise.
gas/
* config/tc-bpf.c: Add option -mxbpf to select xbpf isa.
* testsuite/gas/bpf/indcall-1.d: New file.
* testsuite/gas/bpf/indcall-1.s: Likewise.
* testsuite/gas/bpf/indcall-bad-1.l: Likewise.
* testsuite/gas/bpf/indcall-bad-1.s: Likewise.
* testsuite/gas/bpf/bpf.exp: Run new tests.
opcodes/
* bpf-desc.c: Regenerate.
* bpf-desc.h: Likewise.
* bpf-opc.c: Likewise.
* bpf-opc.h: Likewise.
* disassemble.c (disassemble_init_for_target): Set bits for xBPF
ISA when appropriate.
2020-08-26 21:39:00 +08:00
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{ "mxbpf", no_argument, NULL, OPTION_XBPF },
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2019-05-24 01:05:12 +08:00
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{ NULL, no_argument, NULL, 0 },
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};
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size_t md_longopts_size = sizeof (md_longopts);
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const char * md_shortopts = "";
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extern int target_big_endian;
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/* Whether target_big_endian has been set while parsing command-line
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arguments. */
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static int set_target_endian = 0;
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bpf: add xBPF ISA
This patch adds support for xBPF, another ISA targetting the BPF
virtual architecture. For now, the primary difference between eBPF
and xBPF is that xBPF supports indirect calls through the
'call %reg' form of the call instruction.
bfd/
* archures.c (bfd_mach_xbpf): Define.
* bfd-in2.h: Regenerate.
* cpu-bpf.c (bfd_xbpf_arch) New.
(bfd_bpf_arch) Update next in list field to point to xbpf arch.
cpu/
* bpf.cpu (arch bpf): Add xbpf mach and isas.
(define-xbpf-isa) New pmacro.
(all-isas) Add xbpfle,xbpfbe.
(endian-isas): New pmacro.
(mach xbpf): New.
(model xbpf-def): Likewise.
(h-gpr): Add xbpf mach.
(f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
(f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
(define-alu-insn-un): Use new endian-isas pmacro.
(define-alu-insn-bin, define-alu-insn-mov): Likewise.
(define-endian-insn, define-lddw): Likewise.
(dlind, dxli, dxsi, dsti): Likewise.
(define-cond-jump-insn, define-call-insn): Likewise.
(define-atomic-insns): Likewise.
gas/
* config/tc-bpf.c: Add option -mxbpf to select xbpf isa.
* testsuite/gas/bpf/indcall-1.d: New file.
* testsuite/gas/bpf/indcall-1.s: Likewise.
* testsuite/gas/bpf/indcall-bad-1.l: Likewise.
* testsuite/gas/bpf/indcall-bad-1.s: Likewise.
* testsuite/gas/bpf/bpf.exp: Run new tests.
opcodes/
* bpf-desc.c: Regenerate.
* bpf-desc.h: Likewise.
* bpf-opc.c: Likewise.
* bpf-opc.h: Likewise.
* disassemble.c (disassemble_init_for_target): Set bits for xBPF
ISA when appropriate.
2020-08-26 21:39:00 +08:00
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static int target_xbpf = 0;
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static int set_xbpf = 0;
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2019-05-24 01:05:12 +08:00
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int
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md_parse_option (int c, const char * arg ATTRIBUTE_UNUSED)
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{
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switch (c)
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{
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case OPTION_BIG_ENDIAN:
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set_target_endian = 1;
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target_big_endian = 1;
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break;
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case OPTION_LITTLE_ENDIAN:
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set_target_endian = 1;
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target_big_endian = 0;
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break;
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bpf: add xBPF ISA
This patch adds support for xBPF, another ISA targetting the BPF
virtual architecture. For now, the primary difference between eBPF
and xBPF is that xBPF supports indirect calls through the
'call %reg' form of the call instruction.
bfd/
* archures.c (bfd_mach_xbpf): Define.
* bfd-in2.h: Regenerate.
* cpu-bpf.c (bfd_xbpf_arch) New.
(bfd_bpf_arch) Update next in list field to point to xbpf arch.
cpu/
* bpf.cpu (arch bpf): Add xbpf mach and isas.
(define-xbpf-isa) New pmacro.
(all-isas) Add xbpfle,xbpfbe.
(endian-isas): New pmacro.
(mach xbpf): New.
(model xbpf-def): Likewise.
(h-gpr): Add xbpf mach.
(f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
(f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
(define-alu-insn-un): Use new endian-isas pmacro.
(define-alu-insn-bin, define-alu-insn-mov): Likewise.
(define-endian-insn, define-lddw): Likewise.
(dlind, dxli, dxsi, dsti): Likewise.
(define-cond-jump-insn, define-call-insn): Likewise.
(define-atomic-insns): Likewise.
gas/
* config/tc-bpf.c: Add option -mxbpf to select xbpf isa.
* testsuite/gas/bpf/indcall-1.d: New file.
* testsuite/gas/bpf/indcall-1.s: Likewise.
* testsuite/gas/bpf/indcall-bad-1.l: Likewise.
* testsuite/gas/bpf/indcall-bad-1.s: Likewise.
* testsuite/gas/bpf/bpf.exp: Run new tests.
opcodes/
* bpf-desc.c: Regenerate.
* bpf-desc.h: Likewise.
* bpf-opc.c: Likewise.
* bpf-opc.h: Likewise.
* disassemble.c (disassemble_init_for_target): Set bits for xBPF
ISA when appropriate.
2020-08-26 21:39:00 +08:00
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case OPTION_XBPF:
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set_xbpf = 1;
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target_xbpf = 1;
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break;
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2019-05-24 01:05:12 +08:00
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default:
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return 0;
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}
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return 1;
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}
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void
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md_show_usage (FILE * stream)
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{
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fprintf (stream, _("\nBPF options:\n"));
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fprintf (stream, _("\
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--EL generate code for a little endian machine\n\
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bpf: add xBPF ISA
This patch adds support for xBPF, another ISA targetting the BPF
virtual architecture. For now, the primary difference between eBPF
and xBPF is that xBPF supports indirect calls through the
'call %reg' form of the call instruction.
bfd/
* archures.c (bfd_mach_xbpf): Define.
* bfd-in2.h: Regenerate.
* cpu-bpf.c (bfd_xbpf_arch) New.
(bfd_bpf_arch) Update next in list field to point to xbpf arch.
cpu/
* bpf.cpu (arch bpf): Add xbpf mach and isas.
(define-xbpf-isa) New pmacro.
(all-isas) Add xbpfle,xbpfbe.
(endian-isas): New pmacro.
(mach xbpf): New.
(model xbpf-def): Likewise.
(h-gpr): Add xbpf mach.
(f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
(f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
(define-alu-insn-un): Use new endian-isas pmacro.
(define-alu-insn-bin, define-alu-insn-mov): Likewise.
(define-endian-insn, define-lddw): Likewise.
(dlind, dxli, dxsi, dsti): Likewise.
(define-cond-jump-insn, define-call-insn): Likewise.
(define-atomic-insns): Likewise.
gas/
* config/tc-bpf.c: Add option -mxbpf to select xbpf isa.
* testsuite/gas/bpf/indcall-1.d: New file.
* testsuite/gas/bpf/indcall-1.s: Likewise.
* testsuite/gas/bpf/indcall-bad-1.l: Likewise.
* testsuite/gas/bpf/indcall-bad-1.s: Likewise.
* testsuite/gas/bpf/bpf.exp: Run new tests.
opcodes/
* bpf-desc.c: Regenerate.
* bpf-desc.h: Likewise.
* bpf-opc.c: Likewise.
* bpf-opc.h: Likewise.
* disassemble.c (disassemble_init_for_target): Set bits for xBPF
ISA when appropriate.
2020-08-26 21:39:00 +08:00
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--EB generate code for a big endian machine\n\
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-mxbpf generate xBPF instructions\n"));
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2019-05-24 01:05:12 +08:00
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}
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void
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md_begin (void)
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{
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/* Initialize the `cgen' interface. */
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/* If not specified in the command line, use the host
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endianness. */
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if (!set_target_endian)
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{
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#ifdef WORDS_BIGENDIAN
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target_big_endian = 1;
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#else
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target_big_endian = 0;
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#endif
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}
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bpf: add xBPF ISA
This patch adds support for xBPF, another ISA targetting the BPF
virtual architecture. For now, the primary difference between eBPF
and xBPF is that xBPF supports indirect calls through the
'call %reg' form of the call instruction.
bfd/
* archures.c (bfd_mach_xbpf): Define.
* bfd-in2.h: Regenerate.
* cpu-bpf.c (bfd_xbpf_arch) New.
(bfd_bpf_arch) Update next in list field to point to xbpf arch.
cpu/
* bpf.cpu (arch bpf): Add xbpf mach and isas.
(define-xbpf-isa) New pmacro.
(all-isas) Add xbpfle,xbpfbe.
(endian-isas): New pmacro.
(mach xbpf): New.
(model xbpf-def): Likewise.
(h-gpr): Add xbpf mach.
(f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
(f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
(define-alu-insn-un): Use new endian-isas pmacro.
(define-alu-insn-bin, define-alu-insn-mov): Likewise.
(define-endian-insn, define-lddw): Likewise.
(dlind, dxli, dxsi, dsti): Likewise.
(define-cond-jump-insn, define-call-insn): Likewise.
(define-atomic-insns): Likewise.
gas/
* config/tc-bpf.c: Add option -mxbpf to select xbpf isa.
* testsuite/gas/bpf/indcall-1.d: New file.
* testsuite/gas/bpf/indcall-1.s: Likewise.
* testsuite/gas/bpf/indcall-bad-1.l: Likewise.
* testsuite/gas/bpf/indcall-bad-1.s: Likewise.
* testsuite/gas/bpf/bpf.exp: Run new tests.
opcodes/
* bpf-desc.c: Regenerate.
* bpf-desc.h: Likewise.
* bpf-opc.c: Likewise.
* bpf-opc.h: Likewise.
* disassemble.c (disassemble_init_for_target): Set bits for xBPF
ISA when appropriate.
2020-08-26 21:39:00 +08:00
|
|
|
|
/* If not specified in the command line, use eBPF rather
|
|
|
|
|
than xBPF. */
|
|
|
|
|
if (!set_xbpf)
|
|
|
|
|
target_xbpf = 0;
|
|
|
|
|
|
2019-05-24 01:05:12 +08:00
|
|
|
|
/* Set the ISA, which depends on the target endianness. */
|
|
|
|
|
bpf_isa = cgen_bitset_create (ISA_MAX);
|
|
|
|
|
if (target_big_endian)
|
bpf: add xBPF ISA
This patch adds support for xBPF, another ISA targetting the BPF
virtual architecture. For now, the primary difference between eBPF
and xBPF is that xBPF supports indirect calls through the
'call %reg' form of the call instruction.
bfd/
* archures.c (bfd_mach_xbpf): Define.
* bfd-in2.h: Regenerate.
* cpu-bpf.c (bfd_xbpf_arch) New.
(bfd_bpf_arch) Update next in list field to point to xbpf arch.
cpu/
* bpf.cpu (arch bpf): Add xbpf mach and isas.
(define-xbpf-isa) New pmacro.
(all-isas) Add xbpfle,xbpfbe.
(endian-isas): New pmacro.
(mach xbpf): New.
(model xbpf-def): Likewise.
(h-gpr): Add xbpf mach.
(f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
(f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
(define-alu-insn-un): Use new endian-isas pmacro.
(define-alu-insn-bin, define-alu-insn-mov): Likewise.
(define-endian-insn, define-lddw): Likewise.
(dlind, dxli, dxsi, dsti): Likewise.
(define-cond-jump-insn, define-call-insn): Likewise.
(define-atomic-insns): Likewise.
gas/
* config/tc-bpf.c: Add option -mxbpf to select xbpf isa.
* testsuite/gas/bpf/indcall-1.d: New file.
* testsuite/gas/bpf/indcall-1.s: Likewise.
* testsuite/gas/bpf/indcall-bad-1.l: Likewise.
* testsuite/gas/bpf/indcall-bad-1.s: Likewise.
* testsuite/gas/bpf/bpf.exp: Run new tests.
opcodes/
* bpf-desc.c: Regenerate.
* bpf-desc.h: Likewise.
* bpf-opc.c: Likewise.
* bpf-opc.h: Likewise.
* disassemble.c (disassemble_init_for_target): Set bits for xBPF
ISA when appropriate.
2020-08-26 21:39:00 +08:00
|
|
|
|
{
|
|
|
|
|
if (target_xbpf)
|
|
|
|
|
cgen_bitset_set (bpf_isa, ISA_XBPFBE);
|
|
|
|
|
else
|
|
|
|
|
cgen_bitset_set (bpf_isa, ISA_EBPFBE);
|
|
|
|
|
}
|
2019-05-24 01:05:12 +08:00
|
|
|
|
else
|
bpf: add xBPF ISA
This patch adds support for xBPF, another ISA targetting the BPF
virtual architecture. For now, the primary difference between eBPF
and xBPF is that xBPF supports indirect calls through the
'call %reg' form of the call instruction.
bfd/
* archures.c (bfd_mach_xbpf): Define.
* bfd-in2.h: Regenerate.
* cpu-bpf.c (bfd_xbpf_arch) New.
(bfd_bpf_arch) Update next in list field to point to xbpf arch.
cpu/
* bpf.cpu (arch bpf): Add xbpf mach and isas.
(define-xbpf-isa) New pmacro.
(all-isas) Add xbpfle,xbpfbe.
(endian-isas): New pmacro.
(mach xbpf): New.
(model xbpf-def): Likewise.
(h-gpr): Add xbpf mach.
(f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
(f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
(define-alu-insn-un): Use new endian-isas pmacro.
(define-alu-insn-bin, define-alu-insn-mov): Likewise.
(define-endian-insn, define-lddw): Likewise.
(dlind, dxli, dxsi, dsti): Likewise.
(define-cond-jump-insn, define-call-insn): Likewise.
(define-atomic-insns): Likewise.
gas/
* config/tc-bpf.c: Add option -mxbpf to select xbpf isa.
* testsuite/gas/bpf/indcall-1.d: New file.
* testsuite/gas/bpf/indcall-1.s: Likewise.
* testsuite/gas/bpf/indcall-bad-1.l: Likewise.
* testsuite/gas/bpf/indcall-bad-1.s: Likewise.
* testsuite/gas/bpf/bpf.exp: Run new tests.
opcodes/
* bpf-desc.c: Regenerate.
* bpf-desc.h: Likewise.
* bpf-opc.c: Likewise.
* bpf-opc.h: Likewise.
* disassemble.c (disassemble_init_for_target): Set bits for xBPF
ISA when appropriate.
2020-08-26 21:39:00 +08:00
|
|
|
|
{
|
|
|
|
|
if (target_xbpf)
|
|
|
|
|
cgen_bitset_set (bpf_isa, ISA_XBPFLE);
|
|
|
|
|
else
|
|
|
|
|
cgen_bitset_set (bpf_isa, ISA_EBPFLE);
|
|
|
|
|
}
|
2019-05-24 01:05:12 +08:00
|
|
|
|
|
|
|
|
|
/* Set the machine number and endian. */
|
|
|
|
|
gas_cgen_cpu_desc = bpf_cgen_cpu_open (CGEN_CPU_OPEN_ENDIAN,
|
|
|
|
|
target_big_endian ?
|
|
|
|
|
CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE,
|
2020-06-04 22:17:07 +08:00
|
|
|
|
CGEN_CPU_OPEN_INSN_ENDIAN,
|
|
|
|
|
CGEN_ENDIAN_LITTLE,
|
2019-05-24 01:05:12 +08:00
|
|
|
|
CGEN_CPU_OPEN_ISAS,
|
|
|
|
|
bpf_isa,
|
|
|
|
|
CGEN_CPU_OPEN_END);
|
|
|
|
|
bpf_cgen_init_asm (gas_cgen_cpu_desc);
|
|
|
|
|
|
|
|
|
|
/* This is a callback from cgen to gas to parse operands. */
|
|
|
|
|
cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
|
|
|
|
|
|
|
|
|
|
/* Set the machine type. */
|
|
|
|
|
bfd_default_set_arch_mach (stdoutput, bfd_arch_bpf, bfd_mach_bpf);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
valueT
|
|
|
|
|
md_section_align (segT segment, valueT size)
|
|
|
|
|
{
|
bfd_section_* macros
This large patch removes the unnecessary bfd parameter from various
bfd section macros and functions. The bfd is hardly ever used and if
needed for the bfd_set_section_* or bfd_rename_section functions can
be found via section->owner except for the com, und, abs, and ind
std_section special sections. Those sections shouldn't be modified
anyway.
The patch also removes various bfd_get_section_<field> macros,
replacing their use with bfd_section_<field>, and adds
bfd_set_section_lma. I've also fixed a minor bug in gas where
compressed section renaming was done directly rather than calling
bfd_rename_section. This would have broken bfd_get_section_by_name
and similar functions, but that hardly mattered at such a late stage
in gas processing.
bfd/
* bfd-in.h (bfd_get_section_name, bfd_get_section_vma),
(bfd_get_section_lma, bfd_get_section_alignment),
(bfd_get_section_size, bfd_get_section_flags),
(bfd_get_section_userdata): Delete.
(bfd_section_name, bfd_section_size, bfd_section_vma),
(bfd_section_lma, bfd_section_alignment): Lose bfd parameter.
(bfd_section_flags, bfd_section_userdata): New.
(bfd_is_com_section): Rename parameter.
* section.c (bfd_set_section_userdata, bfd_set_section_vma),
(bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section),
(bfd_set_section_size): Delete bfd parameter, rename section parameter.
(bfd_set_section_lma): New.
* bfd-in2.h: Regenerate.
* mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param,
update callers.
* aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c,
* coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c,
* compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h,
* elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c,
* elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c,
* elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c,
* elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c,
* elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c,
* elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c,
* elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c,
* elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c,
* elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c,
* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
* elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c,
* elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c,
* elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c,
* elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c,
* elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c,
* elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c,
* elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c,
* elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c,
* elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c,
* elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c,
* mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c,
* peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c,
* xcofflink.c: Update throughout for bfd section macro and function
changes.
binutils/
* addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c,
* objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c,
* od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c,
* resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update
throughout for bfd section macro and function changes.
gas/
* as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c,
* read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c,
* config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c,
* config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c,
* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
* config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c,
* config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c,
* config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c,
* config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c,
* config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c,
* config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c,
* config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c,
* config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c,
* config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c,
* config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c,
* config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c,
* config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c,
* config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c,
* config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c,
* config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c,
* config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c,
* config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c,
* config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for
bfd section macro and function changes.
* write.c (compress_debug): Use bfd_rename_section.
gdb/
* aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c,
* coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c,
* dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c,
* exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h,
* hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c,
* i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c,
* maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c,
* mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c,
* objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c,
* ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c,
* rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c,
* s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c,
* solib-spu.c, * solib-svr4.c, * solib-target.c,
* spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c,
* symmisc.c, * symtab.c, * target.c, * windows-nat.c,
* xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c,
* mi/mi-interp.c: Update throughout for bfd section macro and
function changes.
* gcore (gcore_create_callback): Use bfd_set_section_lma.
* spu-tdep.c (spu_overlay_new_objfile): Likewise.
gprof/
* corefile.c, * symtab.c: Update throughout for bfd section
macro and function changes.
ld/
* ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c,
* emultempl/aarch64elf.em, * emultempl/aix.em,
* emultempl/armcoff.em, * emultempl/armelf.em,
* emultempl/cr16elf.em, * emultempl/cskyelf.em,
* emultempl/m68hc1xelf.em, * emultempl/m68kelf.em,
* emultempl/mipself.em, * emultempl/mmix-elfnmmo.em,
* emultempl/mmo.em, * emultempl/msp430.em,
* emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em,
* emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update
throughout for bfd section macro and function changes.
libctf/
* ctf-open-bfd.c: Update throughout for bfd section macro changes.
opcodes/
* arc-ext.c: Update throughout for bfd section macro changes.
sim/
* common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c,
* erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c,
* m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c,
* rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c,
* rx/trace.c: Update throughout for bfd section macro changes.
2019-09-16 18:55:17 +08:00
|
|
|
|
int align = bfd_section_alignment (segment);
|
2019-05-24 01:05:12 +08:00
|
|
|
|
|
|
|
|
|
return ((size + (1 << align) - 1) & -(1 << align));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Functions concerning relocs. */
|
|
|
|
|
|
|
|
|
|
/* The location from which a PC relative jump should be calculated,
|
|
|
|
|
given a PC relative reloc. */
|
|
|
|
|
|
|
|
|
|
long
|
|
|
|
|
md_pcrel_from_section (fixS *fixP, segT sec)
|
|
|
|
|
{
|
|
|
|
|
if (fixP->fx_addsy != (symbolS *) NULL
|
|
|
|
|
&& (! S_IS_DEFINED (fixP->fx_addsy)
|
|
|
|
|
|| (S_GET_SEGMENT (fixP->fx_addsy) != sec)
|
|
|
|
|
|| S_IS_EXTERNAL (fixP->fx_addsy)
|
|
|
|
|
|| S_IS_WEAK (fixP->fx_addsy)))
|
|
|
|
|
{
|
|
|
|
|
/* The symbol is undefined (or is defined but not in this section).
|
|
|
|
|
Let the linker figure it out. */
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
return fixP->fx_where + fixP->fx_frag->fr_address;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Write a value out to the object file, using the appropriate endianness. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_number_to_chars (char * buf, valueT val, int n)
|
|
|
|
|
{
|
|
|
|
|
if (target_big_endian)
|
|
|
|
|
number_to_chars_bigendian (buf, val, n);
|
|
|
|
|
else
|
|
|
|
|
number_to_chars_littleendian (buf, val, n);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
arelent *
|
|
|
|
|
tc_gen_reloc (asection *sec, fixS *fix)
|
|
|
|
|
{
|
|
|
|
|
return gas_cgen_tc_gen_reloc (sec, fix);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* Return the bfd reloc type for OPERAND of INSN at fixup FIXP. This
|
|
|
|
|
is called when the operand is an expression that couldn't be fully
|
|
|
|
|
resolved. Returns BFD_RELOC_NONE if no reloc type can be found.
|
|
|
|
|
*FIXP may be modified if desired. */
|
|
|
|
|
|
|
|
|
|
bfd_reloc_code_real_type
|
|
|
|
|
md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
|
|
|
|
|
const CGEN_OPERAND *operand,
|
|
|
|
|
fixS *fixP)
|
|
|
|
|
{
|
|
|
|
|
switch (operand->type)
|
|
|
|
|
{
|
|
|
|
|
case BPF_OPERAND_OFFSET16:
|
|
|
|
|
return BFD_RELOC_BPF_16;
|
|
|
|
|
case BPF_OPERAND_IMM32:
|
|
|
|
|
return BFD_RELOC_BPF_32;
|
|
|
|
|
case BPF_OPERAND_IMM64:
|
|
|
|
|
return BFD_RELOC_BPF_64;
|
|
|
|
|
case BPF_OPERAND_DISP16:
|
|
|
|
|
fixP->fx_pcrel = 1;
|
|
|
|
|
return BFD_RELOC_BPF_DISP16;
|
|
|
|
|
case BPF_OPERAND_DISP32:
|
|
|
|
|
fixP->fx_pcrel = 1;
|
|
|
|
|
return BFD_RELOC_BPF_DISP32;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
return BFD_RELOC_NONE;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* *FRAGP has been relaxed to its final size, and now needs to have
|
|
|
|
|
the bytes inside it modified to conform to the new size.
|
|
|
|
|
|
|
|
|
|
Called after relaxation is finished.
|
|
|
|
|
fragP->fr_type == rs_machine_dependent.
|
|
|
|
|
fragP->fr_subtype is the subtype of what the address relaxed to. */
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
|
|
|
|
|
segT sec ATTRIBUTE_UNUSED,
|
|
|
|
|
fragS *fragP ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("convert_frag called"));
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int
|
|
|
|
|
md_estimate_size_before_relax (fragS *fragP ATTRIBUTE_UNUSED,
|
|
|
|
|
segT segment ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
as_fatal (_("estimate_size_before_relax called"));
|
|
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_apply_fix (fixS *fixP, valueT *valP, segT seg)
|
|
|
|
|
{
|
|
|
|
|
/* Some fixups for instructions require special attention. This is
|
|
|
|
|
handled in the code block below. */
|
|
|
|
|
if ((int) fixP->fx_r_type >= (int) BFD_RELOC_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
int opindex = (int) fixP->fx_r_type - (int) BFD_RELOC_UNUSED;
|
|
|
|
|
const CGEN_OPERAND *operand = cgen_operand_lookup_by_num (gas_cgen_cpu_desc,
|
|
|
|
|
opindex);
|
|
|
|
|
char *where;
|
|
|
|
|
|
|
|
|
|
switch (operand->type)
|
|
|
|
|
{
|
|
|
|
|
case BPF_OPERAND_DISP32:
|
|
|
|
|
/* eBPF supports two kind of CALL instructions: the so
|
|
|
|
|
called pseudo calls ("bpf to bpf") and external calls
|
|
|
|
|
("bpf to kernel").
|
|
|
|
|
|
|
|
|
|
Both kind of calls use the same instruction (CALL).
|
|
|
|
|
However, external calls are constructed by passing a
|
|
|
|
|
constant argument to the instruction, whereas pseudo
|
|
|
|
|
calls result from expressions involving symbols. In
|
|
|
|
|
practice, instructions requiring a fixup are interpreted
|
|
|
|
|
as pseudo-calls. If we are executing this code, this is
|
|
|
|
|
a pseudo call.
|
|
|
|
|
|
|
|
|
|
The kernel expects for pseudo-calls to be annotated by
|
|
|
|
|
having BPF_PSEUDO_CALL in the SRC field of the
|
|
|
|
|
instruction. But beware the infamous nibble-swapping of
|
|
|
|
|
eBPF and take endianness into account here.
|
|
|
|
|
|
|
|
|
|
Note that the CALL instruction has only one operand, so
|
|
|
|
|
this code is executed only once per instruction. */
|
2020-06-05 22:23:30 +08:00
|
|
|
|
where = fixP->fx_frag->fr_literal + fixP->fx_where + 1;
|
|
|
|
|
where[0] = target_big_endian ? 0x01 : 0x10;
|
2019-05-24 01:05:12 +08:00
|
|
|
|
/* Fallthrough. */
|
|
|
|
|
case BPF_OPERAND_DISP16:
|
|
|
|
|
/* The PC-relative displacement fields in jump instructions
|
|
|
|
|
shouldn't be in bytes. Instead, they hold the number of
|
|
|
|
|
64-bit words to the target, _minus one_. */
|
|
|
|
|
*valP = (((long) (*valP)) - 8) / 8;
|
|
|
|
|
break;
|
|
|
|
|
default:
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* And now invoke CGEN's handler, which will eventually install
|
|
|
|
|
*valP into the corresponding operand. */
|
|
|
|
|
gas_cgen_md_apply_fix (fixP, valP, seg);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_assemble (char *str)
|
|
|
|
|
{
|
|
|
|
|
const CGEN_INSN *insn;
|
|
|
|
|
char *errmsg;
|
|
|
|
|
CGEN_FIELDS fields;
|
|
|
|
|
|
|
|
|
|
#if CGEN_INT_INSN_P
|
|
|
|
|
CGEN_INSN_INT buffer[CGEN_MAX_INSN_SIZE / sizeof (CGEN_INT_INSN_P)];
|
|
|
|
|
#else
|
|
|
|
|
unsigned char buffer[CGEN_MAX_INSN_SIZE];
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
gas_cgen_init_parse ();
|
|
|
|
|
insn = bpf_cgen_assemble_insn (gas_cgen_cpu_desc, str, &fields,
|
|
|
|
|
buffer, &errmsg);
|
|
|
|
|
|
|
|
|
|
if (insn == NULL)
|
|
|
|
|
{
|
|
|
|
|
as_bad ("%s", errmsg);
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
gas_cgen_finish_insn (insn, buffer, CGEN_FIELDS_BITSIZE (&fields),
|
|
|
|
|
0, /* zero to ban relaxable insns. */
|
|
|
|
|
NULL); /* NULL so results not returned here. */
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
|
md_operand (expressionS *expressionP)
|
|
|
|
|
{
|
|
|
|
|
gas_cgen_md_operand (expressionP);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
symbolS *
|
|
|
|
|
md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
|
|
|
|
|
{
|
|
|
|
|
return NULL;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/* Turn a string in input_line_pointer into a floating point constant
|
|
|
|
|
of type TYPE, and store the appropriate bytes in *LITP. The number
|
|
|
|
|
of LITTLENUMS emitted is stored in *SIZEP. An error message is
|
|
|
|
|
returned, or NULL on OK. */
|
|
|
|
|
|
|
|
|
|
const char *
|
|
|
|
|
md_atof (int type, char *litP, int *sizeP)
|
|
|
|
|
{
|
Use bool in gas
* as.h (POISON_BFD_BOOLEAN): Define.
* as.c, * as.h, * atof-generic.c, * config/atof-ieee.c,
* config/bfin-aux.h, * config/obj-coff.c, * config/obj-ecoff.c,
* config/obj-elf.c, * config/obj-elf.h, * config/obj-som.c,
* config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c,
* config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h,
* config/tc-avr.c, * config/tc-avr.h, * config/tc-bfin.c,
* config/tc-bfin.h, * config/tc-bpf.c, * config/tc-cris.c,
* config/tc-csky.c, * config/tc-csky.h, * config/tc-d10v.c,
* config/tc-d10v.h, * config/tc-d30v.c, * config/tc-d30v.h,
* config/tc-dlx.c, * config/tc-dlx.h, * config/tc-epiphany.c,
* config/tc-epiphany.h, * config/tc-fr30.c, * config/tc-fr30.h,
* config/tc-frv.c, * config/tc-frv.h, * config/tc-ft32.c,
* config/tc-ft32.h, * config/tc-h8300.c, * config/tc-hppa.c,
* config/tc-i386-intel.c, * config/tc-i386.c, * config/tc-ia64.c,
* config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-iq2000.h,
* config/tc-lm32.c, * config/tc-lm32.h, * config/tc-m32c.c,
* config/tc-m32c.h, * config/tc-m32r.c, * config/tc-m32r.h,
* config/tc-m68hc11.c, * config/tc-m68k.c, * config/tc-mcore.c,
* config/tc-mcore.h, * config/tc-mep.c, * config/tc-mep.h,
* config/tc-metag.c, * config/tc-metag.h,
* config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mips.h,
* config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c,
* config/tc-mn10300.h, * config/tc-moxie.c, * config/tc-msp430.c,
* config/tc-msp430.h, * config/tc-mt.c, * config/tc-mt.h,
* config/tc-nds32.c, * config/tc-nds32.h, * config/tc-nios2.c,
* config/tc-ns32k.c, * config/tc-or1k.c, * config/tc-or1k.h,
* config/tc-pdp11.c, * config/tc-ppc.c, * config/tc-pru.c,
* config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h,
* config/tc-rx.c, * config/tc-rx.h, * config/tc-s12z.c,
* config/tc-s12z.h, * config/tc-s390.c, * config/tc-score.c,
* config/tc-score.h, * config/tc-score7.c, * config/tc-sh.c,
* config/tc-sh.h, * config/tc-spu.c, * config/tc-tic54x.c,
* config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-tilegx.c,
* config/tc-tilepro.c, * config/tc-v850.c, * config/tc-v850.h,
* config/tc-visium.c, * config/tc-visium.h, * config/tc-wasm32.c,
* config/tc-wasm32.h, * config/tc-xc16x.c, * config/tc-xgate.c,
* config/tc-xstormy16.c, * config/tc-xstormy16.h,
* config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c,
* config/tc-z8k.c, * config/xtensa-istack.h,
* config/xtensa-relax.c, * config/xtensa-relax.h, * dw2gencfi.c,
* dwarf2dbg.c, * dwarf2dbg.h, * expr.c, * expr.h, * frags.c,
* frags.h, * listing.c, * macro.c, * output-file.c, * read.c,
* read.h, * stabs.c, * symbols.c, * write.c: Replace bfd_boolean
with bool, FALSE with false, and TRUE with true.
2021-03-31 08:12:05 +08:00
|
|
|
|
return ieee_md_atof (type, litP, sizeP, false);
|
2019-05-24 01:05:12 +08:00
|
|
|
|
}
|