2019-06-22 04:18:41 +08:00
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static const struct dis386 evex_len_table[][3] = {
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2020-07-14 16:33:40 +08:00
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/* EVEX_LEN_0F3816 */
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2020-07-06 19:41:58 +08:00
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{
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{ Bad_Opcode },
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2020-07-14 16:33:40 +08:00
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{ "vpermp%XW", { XM, Vex, EXx }, PREFIX_DATA },
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{ "vpermp%XW", { XM, Vex, EXx }, PREFIX_DATA },
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2020-07-06 19:41:58 +08:00
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},
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2021-03-10 15:16:54 +08:00
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/* EVEX_LEN_0F3819 */
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2019-06-22 04:18:41 +08:00
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{
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{ Bad_Opcode },
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2021-03-10 15:16:54 +08:00
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{ VEX_W_TABLE (EVEX_W_0F3819_L_n) },
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{ VEX_W_TABLE (EVEX_W_0F3819_L_n) },
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2019-06-22 04:18:41 +08:00
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},
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2021-03-10 15:16:54 +08:00
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/* EVEX_LEN_0F381A_M_0 */
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2019-06-22 04:18:41 +08:00
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{
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{ Bad_Opcode },
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2021-03-10 15:16:54 +08:00
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{ VEX_W_TABLE (EVEX_W_0F381A_M_0_L_n) },
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{ VEX_W_TABLE (EVEX_W_0F381A_M_0_L_n) },
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2019-06-22 04:18:41 +08:00
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},
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2021-03-10 15:16:54 +08:00
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/* EVEX_LEN_0F381B_M_0 */
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2019-06-22 04:18:41 +08:00
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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2021-03-10 15:16:54 +08:00
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{ VEX_W_TABLE (EVEX_W_0F381B_M_0_L_2) },
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2019-06-22 04:18:41 +08:00
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},
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2020-07-14 16:33:40 +08:00
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/* EVEX_LEN_0F3836 */
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2020-07-06 19:41:58 +08:00
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{
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{ Bad_Opcode },
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2020-07-14 16:33:40 +08:00
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{ "vperm%DQ", { XM, Vex, EXx }, PREFIX_DATA },
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{ "vperm%DQ", { XM, Vex, EXx }, PREFIX_DATA },
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2020-07-06 19:41:58 +08:00
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},
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2021-03-10 15:16:54 +08:00
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/* EVEX_LEN_0F385A_M_0 */
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i386: Check vector length for scatter/gather prefetch instructions
Since not all vector lengths are supported by scatter/gather prefetch
instructions, decode them only with supported vector lengths.
gas/
PR binutils/24719
* testsuite/gas/i386/disassem.s: Add test for vgatherpf0dps
with invalid vector length.
* testsuite/gas/i386/x86-64-disassem.s: Likewise.
* testsuite/gas/i386/disassem.d: Updated.
* testsuite/gas/i386/x86-64-disassem.d: Likewise.
opcodes/
PR binutils/24719
* i386-dis-evex-len.h: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1.
* i386-dis-evex-prefix.h: Update PREFIX_EVEX_0F38C6_REG_1,
PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5 and
PREFIX_EVEX_0F38C6_REG_6 entries.
* i386-dis-evex-w.h: Update EVEX_W_0F38C7_R_1_P_2,
EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2 and
EVEX_W_0F38C7_R_6_P_2 entries.
* i386-dis.c: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1 enums.
2019-06-28 04:39:19 +08:00
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{
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{ Bad_Opcode },
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2021-03-10 15:16:54 +08:00
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{ VEX_W_TABLE (EVEX_W_0F385A_M_0_L_n) },
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{ VEX_W_TABLE (EVEX_W_0F385A_M_0_L_n) },
|
i386: Check vector length for scatter/gather prefetch instructions
Since not all vector lengths are supported by scatter/gather prefetch
instructions, decode them only with supported vector lengths.
gas/
PR binutils/24719
* testsuite/gas/i386/disassem.s: Add test for vgatherpf0dps
with invalid vector length.
* testsuite/gas/i386/x86-64-disassem.s: Likewise.
* testsuite/gas/i386/disassem.d: Updated.
* testsuite/gas/i386/x86-64-disassem.d: Likewise.
opcodes/
PR binutils/24719
* i386-dis-evex-len.h: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1.
* i386-dis-evex-prefix.h: Update PREFIX_EVEX_0F38C6_REG_1,
PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5 and
PREFIX_EVEX_0F38C6_REG_6 entries.
* i386-dis-evex-w.h: Update EVEX_W_0F38C7_R_1_P_2,
EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2 and
EVEX_W_0F38C7_R_6_P_2 entries.
* i386-dis.c: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1 enums.
2019-06-28 04:39:19 +08:00
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},
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2021-03-10 15:16:54 +08:00
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/* EVEX_LEN_0F385B_M_0 */
|
i386: Check vector length for scatter/gather prefetch instructions
Since not all vector lengths are supported by scatter/gather prefetch
instructions, decode them only with supported vector lengths.
gas/
PR binutils/24719
* testsuite/gas/i386/disassem.s: Add test for vgatherpf0dps
with invalid vector length.
* testsuite/gas/i386/x86-64-disassem.s: Likewise.
* testsuite/gas/i386/disassem.d: Updated.
* testsuite/gas/i386/x86-64-disassem.d: Likewise.
opcodes/
PR binutils/24719
* i386-dis-evex-len.h: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1.
* i386-dis-evex-prefix.h: Update PREFIX_EVEX_0F38C6_REG_1,
PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5 and
PREFIX_EVEX_0F38C6_REG_6 entries.
* i386-dis-evex-w.h: Update EVEX_W_0F38C7_R_1_P_2,
EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2 and
EVEX_W_0F38C7_R_6_P_2 entries.
* i386-dis.c: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1 enums.
2019-06-28 04:39:19 +08:00
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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2021-03-10 15:16:54 +08:00
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{ VEX_W_TABLE (EVEX_W_0F385B_M_0_L_2) },
|
i386: Check vector length for scatter/gather prefetch instructions
Since not all vector lengths are supported by scatter/gather prefetch
instructions, decode them only with supported vector lengths.
gas/
PR binutils/24719
* testsuite/gas/i386/disassem.s: Add test for vgatherpf0dps
with invalid vector length.
* testsuite/gas/i386/x86-64-disassem.s: Likewise.
* testsuite/gas/i386/disassem.d: Updated.
* testsuite/gas/i386/x86-64-disassem.d: Likewise.
opcodes/
PR binutils/24719
* i386-dis-evex-len.h: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1.
* i386-dis-evex-prefix.h: Update PREFIX_EVEX_0F38C6_REG_1,
PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5 and
PREFIX_EVEX_0F38C6_REG_6 entries.
* i386-dis-evex-w.h: Update EVEX_W_0F38C7_R_1_P_2,
EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2 and
EVEX_W_0F38C7_R_6_P_2 entries.
* i386-dis.c: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1 enums.
2019-06-28 04:39:19 +08:00
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},
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2021-03-10 15:16:54 +08:00
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/* EVEX_LEN_0F38C6_M_0 */
|
i386: Check vector length for scatter/gather prefetch instructions
Since not all vector lengths are supported by scatter/gather prefetch
instructions, decode them only with supported vector lengths.
gas/
PR binutils/24719
* testsuite/gas/i386/disassem.s: Add test for vgatherpf0dps
with invalid vector length.
* testsuite/gas/i386/x86-64-disassem.s: Likewise.
* testsuite/gas/i386/disassem.d: Updated.
* testsuite/gas/i386/x86-64-disassem.d: Likewise.
opcodes/
PR binutils/24719
* i386-dis-evex-len.h: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1.
* i386-dis-evex-prefix.h: Update PREFIX_EVEX_0F38C6_REG_1,
PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5 and
PREFIX_EVEX_0F38C6_REG_6 entries.
* i386-dis-evex-w.h: Update EVEX_W_0F38C7_R_1_P_2,
EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2 and
EVEX_W_0F38C7_R_6_P_2 entries.
* i386-dis.c: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1 enums.
2019-06-28 04:39:19 +08:00
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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2021-03-10 15:16:54 +08:00
|
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{ REG_TABLE (REG_EVEX_0F38C6_M_0_L_2) },
|
i386: Check vector length for scatter/gather prefetch instructions
Since not all vector lengths are supported by scatter/gather prefetch
instructions, decode them only with supported vector lengths.
gas/
PR binutils/24719
* testsuite/gas/i386/disassem.s: Add test for vgatherpf0dps
with invalid vector length.
* testsuite/gas/i386/x86-64-disassem.s: Likewise.
* testsuite/gas/i386/disassem.d: Updated.
* testsuite/gas/i386/x86-64-disassem.d: Likewise.
opcodes/
PR binutils/24719
* i386-dis-evex-len.h: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1.
* i386-dis-evex-prefix.h: Update PREFIX_EVEX_0F38C6_REG_1,
PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5 and
PREFIX_EVEX_0F38C6_REG_6 entries.
* i386-dis-evex-w.h: Update EVEX_W_0F38C7_R_1_P_2,
EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2 and
EVEX_W_0F38C7_R_6_P_2 entries.
* i386-dis.c: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1 enums.
2019-06-28 04:39:19 +08:00
|
|
|
},
|
|
|
|
|
2021-03-10 15:16:54 +08:00
|
|
|
/* EVEX_LEN_0F38C7_M_0 */
|
i386: Check vector length for scatter/gather prefetch instructions
Since not all vector lengths are supported by scatter/gather prefetch
instructions, decode them only with supported vector lengths.
gas/
PR binutils/24719
* testsuite/gas/i386/disassem.s: Add test for vgatherpf0dps
with invalid vector length.
* testsuite/gas/i386/x86-64-disassem.s: Likewise.
* testsuite/gas/i386/disassem.d: Updated.
* testsuite/gas/i386/x86-64-disassem.d: Likewise.
opcodes/
PR binutils/24719
* i386-dis-evex-len.h: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1.
* i386-dis-evex-prefix.h: Update PREFIX_EVEX_0F38C6_REG_1,
PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5 and
PREFIX_EVEX_0F38C6_REG_6 entries.
* i386-dis-evex-w.h: Update EVEX_W_0F38C7_R_1_P_2,
EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2 and
EVEX_W_0F38C7_R_6_P_2 entries.
* i386-dis.c: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1 enums.
2019-06-28 04:39:19 +08:00
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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2021-03-10 15:20:29 +08:00
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{ REG_TABLE (REG_EVEX_0F38C7_M_0_L_2) },
|
i386: Check vector length for scatter/gather prefetch instructions
Since not all vector lengths are supported by scatter/gather prefetch
instructions, decode them only with supported vector lengths.
gas/
PR binutils/24719
* testsuite/gas/i386/disassem.s: Add test for vgatherpf0dps
with invalid vector length.
* testsuite/gas/i386/x86-64-disassem.s: Likewise.
* testsuite/gas/i386/disassem.d: Updated.
* testsuite/gas/i386/x86-64-disassem.d: Likewise.
opcodes/
PR binutils/24719
* i386-dis-evex-len.h: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1.
* i386-dis-evex-prefix.h: Update PREFIX_EVEX_0F38C6_REG_1,
PREFIX_EVEX_0F38C6_REG_2, PREFIX_EVEX_0F38C6_REG_5 and
PREFIX_EVEX_0F38C6_REG_6 entries.
* i386-dis-evex-w.h: Update EVEX_W_0F38C7_R_1_P_2,
EVEX_W_0F38C7_R_2_P_2, EVEX_W_0F38C7_R_5_P_2 and
EVEX_W_0F38C7_R_6_P_2 entries.
* i386-dis.c: Add EVEX_LEN_0F38C6_REG_1_PREFIX_2,
EVEX_LEN_0F38C6_REG_2_PREFIX_2, EVEX_LEN_0F38C6_REG_5_PREFIX_2,
EVEX_LEN_0F38C6_REG_6_PREFIX_2, EVEX_LEN_0F38C7_R_1_P_2_W_0,
EVEX_LEN_0F38C7_R_1_P_2_W_1, EVEX_LEN_0F38C7_R_2_P_2_W_0,
EVEX_LEN_0F38C7_R_2_P_2_W_1, EVEX_LEN_0F38C7_R_5_P_2_W_0,
EVEX_LEN_0F38C7_R_5_P_2_W_1, EVEX_LEN_0F38C7_R_6_P_2_W_0 and
EVEX_LEN_0F38C7_R_6_P_2_W_1 enums.
2019-06-28 04:39:19 +08:00
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},
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2021-03-10 15:18:24 +08:00
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/* EVEX_LEN_0F3A00 */
|
2020-07-06 19:41:58 +08:00
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{
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{ Bad_Opcode },
|
2021-03-10 15:18:24 +08:00
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{ VEX_W_TABLE (VEX_W_0F3A00_L_1) },
|
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{ VEX_W_TABLE (VEX_W_0F3A00_L_1) },
|
2020-07-06 19:41:58 +08:00
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},
|
|
|
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|
2021-03-10 15:18:24 +08:00
|
|
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/* EVEX_LEN_0F3A01 */
|
2020-07-06 19:41:58 +08:00
|
|
|
{
|
|
|
|
{ Bad_Opcode },
|
2021-03-10 15:18:24 +08:00
|
|
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{ VEX_W_TABLE (VEX_W_0F3A01_L_1) },
|
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|
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{ VEX_W_TABLE (VEX_W_0F3A01_L_1) },
|
2020-07-06 19:41:58 +08:00
|
|
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},
|
|
|
|
|
2021-03-10 15:16:54 +08:00
|
|
|
/* EVEX_LEN_0F3A18 */
|
2019-06-22 04:18:41 +08:00
|
|
|
{
|
|
|
|
{ Bad_Opcode },
|
2021-03-10 15:16:54 +08:00
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A18_L_n) },
|
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A18_L_n) },
|
2019-06-22 04:18:41 +08:00
|
|
|
},
|
|
|
|
|
2021-03-10 15:16:54 +08:00
|
|
|
/* EVEX_LEN_0F3A19 */
|
2019-06-22 04:18:41 +08:00
|
|
|
{
|
|
|
|
{ Bad_Opcode },
|
2021-03-10 15:16:54 +08:00
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A19_L_n) },
|
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A19_L_n) },
|
2019-06-22 04:18:41 +08:00
|
|
|
},
|
|
|
|
|
2021-03-10 15:16:54 +08:00
|
|
|
/* EVEX_LEN_0F3A1A */
|
2019-06-22 04:18:41 +08:00
|
|
|
{
|
|
|
|
{ Bad_Opcode },
|
|
|
|
{ Bad_Opcode },
|
2021-03-10 15:16:54 +08:00
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A1A_L_2) },
|
2019-06-22 04:18:41 +08:00
|
|
|
},
|
|
|
|
|
2021-03-10 15:16:54 +08:00
|
|
|
/* EVEX_LEN_0F3A1B */
|
2019-06-22 04:18:41 +08:00
|
|
|
{
|
|
|
|
{ Bad_Opcode },
|
|
|
|
{ Bad_Opcode },
|
2021-03-10 15:16:54 +08:00
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A1B_L_2) },
|
2019-06-22 04:18:41 +08:00
|
|
|
},
|
|
|
|
|
2021-03-10 15:16:54 +08:00
|
|
|
/* EVEX_LEN_0F3A23 */
|
2019-06-22 04:18:41 +08:00
|
|
|
{
|
|
|
|
{ Bad_Opcode },
|
2021-03-10 15:16:54 +08:00
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A23_L_n) },
|
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A23_L_n) },
|
2019-06-22 04:18:41 +08:00
|
|
|
},
|
|
|
|
|
2021-03-10 15:16:54 +08:00
|
|
|
/* EVEX_LEN_0F3A38 */
|
2019-06-22 04:18:41 +08:00
|
|
|
{
|
|
|
|
{ Bad_Opcode },
|
2021-03-10 15:16:54 +08:00
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A38_L_n) },
|
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A38_L_n) },
|
2019-06-22 04:18:41 +08:00
|
|
|
},
|
|
|
|
|
2021-03-10 15:16:54 +08:00
|
|
|
/* EVEX_LEN_0F3A39 */
|
2019-06-22 04:18:41 +08:00
|
|
|
{
|
|
|
|
{ Bad_Opcode },
|
2021-03-10 15:16:54 +08:00
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A39_L_n) },
|
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A39_L_n) },
|
2019-06-22 04:18:41 +08:00
|
|
|
},
|
|
|
|
|
2021-03-10 15:16:54 +08:00
|
|
|
/* EVEX_LEN_0F3A3A */
|
2019-06-22 04:18:41 +08:00
|
|
|
{
|
|
|
|
{ Bad_Opcode },
|
2020-07-06 19:43:05 +08:00
|
|
|
{ Bad_Opcode },
|
2021-03-10 15:16:54 +08:00
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A3A_L_2) },
|
2019-06-22 04:18:41 +08:00
|
|
|
},
|
|
|
|
|
2021-03-10 15:16:54 +08:00
|
|
|
/* EVEX_LEN_0F3A3B */
|
2019-06-22 04:18:41 +08:00
|
|
|
{
|
|
|
|
{ Bad_Opcode },
|
2020-07-06 19:43:05 +08:00
|
|
|
{ Bad_Opcode },
|
2021-03-10 15:16:54 +08:00
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A3B_L_2) },
|
2019-06-22 04:18:41 +08:00
|
|
|
},
|
|
|
|
|
2021-03-10 15:16:54 +08:00
|
|
|
/* EVEX_LEN_0F3A43 */
|
2019-06-22 04:18:41 +08:00
|
|
|
{
|
|
|
|
{ Bad_Opcode },
|
2021-03-10 15:16:54 +08:00
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A43_L_n) },
|
|
|
|
{ VEX_W_TABLE (EVEX_W_0F3A43_L_n) },
|
2019-06-22 04:18:41 +08:00
|
|
|
},
|
|
|
|
};
|