2021-10-22 16:42:06 +08:00
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/* tc-loongarch.h -- Header file for tc-loongarch.c.
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2024-01-04 19:52:08 +08:00
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Copyright (C) 2021-2024 Free Software Foundation, Inc.
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2021-10-22 16:42:06 +08:00
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Contributed by Loongson Ltd.
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This file is part of GAS.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the license, or
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(at your option) any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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#ifndef TC_LOONGARCH
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#define TC_LOONGARCH
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2023-06-02 17:24:10 +08:00
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#include "opcode/loongarch.h"
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2021-10-22 16:42:06 +08:00
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#define TARGET_BYTES_BIG_ENDIAN 0
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#define TARGET_ARCH bfd_arch_loongarch
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2022-03-13 16:49:07 +08:00
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#define TARGET_MACH (loongarch_mach ())
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extern unsigned long loongarch_mach (void);
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2021-10-22 16:42:06 +08:00
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#define WORKING_DOT_WORD 1
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#define REPEAT_CONS_EXPRESSIONS
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2024-05-29 14:50:39 +08:00
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#define md_end loongarch_md_end
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extern void loongarch_md_end (void);
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2021-10-22 16:42:06 +08:00
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/* Early than md_begin. */
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#define md_after_parse_args loongarch_after_parse_args
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extern void loongarch_after_parse_args (void);
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extern void loongarch_pop_insert (void);
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#define md_pop_insert() loongarch_pop_insert ()
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#define TARGET_FORMAT loongarch_target_format ()
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extern const char *loongarch_target_format (void);
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#define md_relax_frag(segment, fragp, stretch) \
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loongarch_relax_frag (segment, fragp, stretch)
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extern int loongarch_relax_frag (asection *, struct frag *, long);
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#define md_section_align(seg, size) (size)
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#define md_undefined_symbol(name) (0)
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#define md_operand(x)
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2023-12-08 15:15:50 +08:00
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extern bool loongarch_frag_align_code (int, int);
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2022-12-01 16:17:46 +08:00
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#define md_do_align(N, FILL, LEN, MAX, LABEL) \
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if ((N) != 0 && !(FILL) && !need_pass_2 && subseg_text_p (now_seg)) \
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{ \
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if (loongarch_frag_align_code (N, MAX)) \
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2022-12-01 16:17:46 +08:00
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goto LABEL; \
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}
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/* The following two macros let the linker resolve all the relocs
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due to relaxation.
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2023-06-02 17:24:10 +08:00
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2022-12-01 16:17:46 +08:00
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This is called to see whether a reloc against a defined symbol
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2023-06-02 17:24:10 +08:00
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should be converted into a reloc against a section.
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If relax and norelax have different value may cause ld ".eh_frame_hdr
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refers to overlapping FDEs" error when link relax .o and norelax .o. */
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2022-12-01 16:17:46 +08:00
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#define tc_fix_adjustable(fixp) 0
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2023-06-02 17:24:10 +08:00
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/* Tne difference between same-section symbols may be affected by linker
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2022-12-01 16:17:46 +08:00
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relaxation, so do not resolve such expressions in the assembler. */
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#define md_allow_local_subtract(l,r,s) 0
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2021-10-22 16:42:06 +08:00
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2023-09-01 11:09:00 +08:00
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/* If subsy of BFD_RELOC32/64 and PC in same segment, and without relax
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or PC at start of subsy or with relax but sub_symbol_segment not in
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SEC_CODE, we generate 32/64_PCREL. */
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#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) \
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2023-09-28 16:01:52 +08:00
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(!(LARCH_opts.thin_add_sub \
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&& (BFD_RELOC_32 || BFD_RELOC_64) \
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&& (!LARCH_opts.relax \
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|| S_GET_VALUE (FIX->fx_subsy) \
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== FIX->fx_frag->fr_address + FIX->fx_where \
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|| (LARCH_opts.relax \
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&& ((S_GET_SEGMENT (FIX->fx_subsy)->flags & SEC_CODE) == 0)))))
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2023-06-02 17:24:10 +08:00
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2021-10-22 16:42:06 +08:00
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) 1
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#define DIFF_EXPR_OK 1
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2023-06-02 17:24:10 +08:00
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/* Postpone text-section label subtraction calculation until linking, since
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linker relaxations might change the deltas. */
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2022-12-01 16:17:46 +08:00
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#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEC) \
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(LARCH_opts.relax ? \
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(GENERIC_FORCE_RELOCATION_SUB_SAME (FIX, SEC) \
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2024-04-22 17:49:50 +08:00
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|| ((SEC)->flags & SEC_CODE) != 0) \
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2023-06-02 17:24:10 +08:00
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: (GENERIC_FORCE_RELOCATION_SUB_SAME (FIX, SEC))) \
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2022-12-01 16:17:46 +08:00
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#define TC_LINKRELAX_FIXUP(seg) ((seg->flags & SEC_CODE) \
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|| (seg->flags & SEC_DEBUGGING))
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#define TC_FORCE_RELOCATION_LOCAL(FIX) 1
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/* Values passed to md_apply_fix don't include symbol values. */
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#define MD_APPLY_SYM_VALUE(FIX) 0
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2021-10-22 16:42:06 +08:00
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#define TARGET_USE_CFIPOP 1
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2024-04-29 15:11:31 +08:00
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/* Adjust debug_line after relaxation. */
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#define DWARF2_USE_FIXED_ADVANCE_PC 1
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/* FDE Data Alignment Factor.
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FDE Code Alignment Factor (DWARF2_LINE_MIN_INSN_LENGTH) should be 1
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because DW_CFA_advance_loc need to be relocated in bytes
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when linker relaxation. */
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#define DWARF2_CIE_DATA_ALIGNMENT (-8)
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#define DWARF2_DEFAULT_RETURN_COLUMN 1 /* FDE Return Address Register. */
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2021-10-22 16:42:06 +08:00
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#define tc_cfi_frame_initial_instructions \
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loongarch_cfi_frame_initial_instructions
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extern void loongarch_cfi_frame_initial_instructions (void);
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2022-12-01 16:17:46 +08:00
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#define tc_symbol_new_hook(sym) \
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if (0 == strcmp (sym->bsym->name, FAKE_LABEL_NAME)) \
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S_SET_OTHER (sym, STV_HIDDEN);
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2021-10-22 16:42:06 +08:00
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#define tc_parse_to_dw2regnum tc_loongarch_parse_to_dw2regnum
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extern void tc_loongarch_parse_to_dw2regnum (expressionS *);
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2022-12-01 16:17:46 +08:00
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extern void loongarch_pre_output_hook (void);
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#define md_pre_output_hook loongarch_pre_output_hook ()
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2023-08-11 16:10:40 +08:00
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#define GAS_SORT_RELOCS 1
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2021-10-22 16:42:06 +08:00
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2022-08-04 14:49:40 +08:00
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#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) 0
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2021-10-22 16:42:06 +08:00
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#define HANDLE_ALIGN(fragp) loongarch_handle_align (fragp)
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extern void loongarch_handle_align (struct frag *);
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#define MAX_MEM_FOR_RS_ALIGN_CODE (3 + 4)
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#define elf_tc_final_processing loongarch_elf_final_processing
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extern void loongarch_elf_final_processing (void);
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#define MAX_RELOC_NUMBER_A_INSN 20
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struct reloc_info
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{
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bfd_reloc_code_real_type type;
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expressionS value;
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};
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2022-12-01 16:17:46 +08:00
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#define md_finish loongarch_md_finish
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extern void loongarch_md_finish (void);
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2021-10-22 16:42:06 +08:00
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#endif
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