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https://sourceware.org/git/binutils-gdb.git
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137 lines
3.5 KiB
ArmAsm
137 lines
3.5 KiB
ArmAsm
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//Original:/proj/frio/dv/testcases/core/c_dsp32alu_byteop1ew/c_dsp32alu_byteop1ew.dsp
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// Spec Reference: dsp32alu byteop1ew
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# mach: bfin
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.include "testutils.inc"
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start
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imm32 r0, 0x15678911;
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imm32 r1, 0x2789ab1d;
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imm32 r2, 0x34445515;
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imm32 r3, 0x46667717;
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imm32 r4, 0x5567891b;
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imm32 r5, 0x6789ab1d;
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imm32 r6, 0x74445515;
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imm32 r7, 0x86667777;
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R4 = BYTEOP1P ( R1:0 , R3:2 );
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R5 = BYTEOP1P ( R1:0 , R3:2 ) (R);
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R6 = BYTEOP1P ( R1:0 , R3:2 ) (T);
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R7 = BYTEOP1P ( R1:0 , R3:2 ) (T , R);
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R0 = BYTEOP1P ( R1:0 , R3:2 ) (T , R);
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CHECKREG r4, 0x25566F13;
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CHECKREG r5, 0x3778911A;
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CHECKREG r6, 0x24556F13;
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CHECKREG r7, 0x3677911A;
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CHECKREG r0, 0x3677911A;
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imm32 r0, 0x1567892b;
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imm32 r1, 0x2789ab2d;
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imm32 r2, 0x34445525;
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imm32 r3, 0x46667727;
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imm32 r4, 0x58889929;
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imm32 r5, 0x6aaabb2b;
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imm32 r6, 0x7cccdd2d;
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imm32 r7, 0x8eeeffff;
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R0 = BYTEOP1P ( R3:2 , R1:0 );
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R1 = BYTEOP1P ( R3:2 , R1:0 ) (R);
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R2 = BYTEOP1P ( R3:2 , R1:0 ) (T);
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R3 = BYTEOP1P ( R3:2 , R1:0 ) (T , R);
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R4 = BYTEOP1P ( R3:2 , R1:0 ) (T , R);
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R5 = BYTEOP1P ( R3:2 , R1:0 ) (T , R);
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R6 = BYTEOP1P ( R3:2 , R1:0 ) (T , R);
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R7 = BYTEOP1P ( R3:2 , R1:0 ) (T , R);
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CHECKREG r0, 0x25566F28;
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CHECKREG r1, 0x3778912A;
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CHECKREG r2, 0x2C4D6226;
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CHECKREG r3, 0x3E6F8428;
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CHECKREG r4, 0x3A738A29;
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CHECKREG r5, 0x3A738A29;
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CHECKREG r6, 0x3A738A29;
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CHECKREG r7, 0x3A738A29;
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imm32 r0, 0x416789ab;
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imm32 r1, 0x6289abcd;
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imm32 r2, 0x43445555;
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imm32 r3, 0x64667777;
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imm32 r0, 0x456789ab;
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imm32 r1, 0x6689abcd;
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imm32 r2, 0x47445555;
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imm32 r3, 0x68667777;
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( R1 , R2 ) = BYTEOP16P ( R1:0 , R3:2 );
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( R0 , R3 ) = BYTEOP16P ( R1:0 , R3:2 ) (R);
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( R4 , R5 ) = BYTEOP16P ( R3:2 , R1:0 );
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( R6 , R7 ) = BYTEOP16P ( R3:2 , R1:0 );
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CHECKREG r0, 0x006800F2;
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CHECKREG r1, 0x008C00AB;
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CHECKREG r2, 0x00DE0100;
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CHECKREG r3, 0x00770122;
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CHECKREG r4, 0x00000146;
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CHECKREG r5, 0x000100F2;
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CHECKREG r6, 0x00000146;
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CHECKREG r7, 0x000100F2;
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imm32 r0, 0x416789ab;
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imm32 r1, 0x6289abcd;
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imm32 r2, 0x43445555;
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imm32 r3, 0x64667777;
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imm32 r0, 0x456789ab;
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imm32 r1, 0x6689abcd;
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imm32 r2, 0x47445555;
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imm32 r3, 0x68667777;
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( R7 , R6 ) = BYTEOP16P ( R3:2 , R1:0 );
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( R5 , R4 ) = BYTEOP16P ( R3:2 , R1:0 ) (R);
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( R2 , R3 ) = BYTEOP16P ( R3:2 , R1:0 );
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( R1 , R0 ) = BYTEOP16P ( R3:2 , R1:0 );
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CHECKREG r0, 0x00890156;
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CHECKREG r1, 0x004500F3;
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CHECKREG r2, 0x008C00AB;
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CHECKREG r3, 0x00DE0100;
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CHECKREG r4, 0x01220144;
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CHECKREG r5, 0x00CE00EF;
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CHECKREG r6, 0x00DE0100;
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CHECKREG r7, 0x008C00AB;
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imm32 r0, 0x416789ab;
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imm32 r1, 0x6289abcd;
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imm32 r2, 0x43445555;
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imm32 r3, 0x64667777;
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imm32 r0, 0x456789ab;
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imm32 r1, 0x6689abcd;
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imm32 r2, 0x47445555;
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imm32 r3, 0x68667777;
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( R1 , R2 ) = BYTEOP16M ( R1:0 , R3:2 );
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( R0 , R3 ) = BYTEOP16M ( R1:0 , R3:2 ) (R);
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( R4 , R5 ) = BYTEOP16M ( R3:2 , R1:0 );
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( R6 , R7 ) = BYTEOP16M ( R3:2 , R1:0 );
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CHECKREG r0, 0x00970098;
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CHECKREG r1, 0xFFFE0023;
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CHECKREG r2, 0x00340056;
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CHECKREG r3, 0xFF89FFAC;
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CHECKREG r4, 0x0000FF9D;
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CHECKREG r5, 0x0000FFBE;
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CHECKREG r6, 0x0000FF9D;
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CHECKREG r7, 0x0000FFBE;
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imm32 r0, 0x516789ab;
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imm32 r1, 0x6289abcd;
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imm32 r2, 0x73445555;
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imm32 r3, 0x84667777;
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imm32 r0, 0x956789ab;
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imm32 r1, 0xa689abcd;
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imm32 r2, 0xb7445555;
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imm32 r3, 0xc86def77;
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( R7 , R6 ) = BYTEOP16M ( R3:2 , R1:0 );
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( R5 , R4 ) = BYTEOP16M ( R3:2 , R1:0 ) (R);
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( R2 , R3 ) = BYTEOP16M ( R3:2 , R1:0 );
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( R1 , R0 ) = BYTEOP16M ( R3:2 , R1:0 );
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CHECKREG r0, 0x00760032;
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CHECKREG r1, 0xFF6BFFBB;
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CHECKREG r2, 0x0022FFDD;
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CHECKREG r3, 0xFFCCFFAA;
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CHECKREG r4, 0x0044FFAA;
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CHECKREG r5, 0x0022FFE4;
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CHECKREG r6, 0xFFCCFFAA;
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CHECKREG r7, 0x0022FFDD;
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pass
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