binutils-gdb/gas/config/tc-sh.h

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/* This file is tc-sh.h
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Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
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Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
#define TC_SH
#define TARGET_ARCH bfd_arch_sh
#if ANSI_PROTOTYPES
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/* The type fixS is defined (to struct fix) in write.h, but write.h uses
definitions from this file. To avoid problems with including write.h
after the "right" definitions, don't; just forward-declare struct fix
here. */
struct fix;
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struct segment_info_struct;
struct internal_reloc;
#endif
/* Whether -relax was used. */
extern int sh_relax;
/* Whether -small was used. */
extern int sh_small;
/* Don't try to break words. */
#define WORKING_DOT_WORD
/* All SH instructions are multiples of 16 bits. */
#define DWARF2_LINE_MIN_INSN_LENGTH 2
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/* We require .long, et. al., to be aligned correctly. */
#define md_cons_align(nbytes) sh_cons_align (nbytes)
extern void sh_cons_align PARAMS ((int));
/* When relaxing, we need to generate relocations for alignment
directives. */
#define HANDLE_ALIGN(frag) sh_handle_align (frag)
extern void sh_handle_align PARAMS ((fragS *));
* as.h (rs_align_test): New. * frags.c (NOP_OPCODE): Move default from read.c. (MAX_MEM_FOR_RS_ALIGN_CODE): New default. (frag_align_code): New. * frags.h (frag_align_code): Declare. * read.c (NOP_OPCODE): Remove. (do_align): Use frag_align_code. * write.c (NOP_OPCODE): Remove. (get_recorded_alignment): New. (cvt_frag_to_fill): Handle rs_align_test. (relax_segment): Likewise. (subsegs_finish): Align last subseg in section to the section alignment. Use frag_align_code. * write.h (get_recorded_alignment): Declare. * config/obj-coff.c (size_section): Handle rs_align_test. (fill_section, fixup_mdeps): Likewise. (write_object_file): Use frag_align_code. * config/tc-alpha.c (alpha_align): Use frag_align_code. (alpha_handle_align): New. * config/tc-alpha.h (HANDLE_ALIGN): New. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-i386.h (md_do_align): Use frag_align_code. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-ia64.c (ia64_md_do_align): Don't do code alignment. (ia64_handle_align): New. * config/tc-ia64.h (HANDLE_ALIGN): New. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-m32r.c (m32r_do_align): Remove. (m32r_handle_align): New. (fill_insn): Use frag_align_code. * config/tc-m32r.h (md_do_align): Remove. (HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-m88k.c, config/tc-m88k.h: Similarly. * config/tc-mips.c, config/tc-mips.h: Similarly. * config/tc-sh.c (sh_cons_align): Use rs_align_test. (sh_handle_align): Likewise. Handle rs_align_code. (sh_do_align): Remove. * config/tc-sh.h (md_do_align): Remove. (MAX_MEM_FOR_RS_ALIGN_CODE): New. * config/tc-sparc.c (sparc_cons_align): Use rs_align_test. (sparc_handle_align): Likewise. Handle rs_align_code. * config/tc-sparc.h (md_do_align): Remove. (MAX_MEM_FOR_RS_ALIGN_CODE): New.
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#define MAX_MEM_FOR_RS_ALIGN_CODE (1 + 2)
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/* We need to force out some relocations when relaxing. */
#define TC_FORCE_RELOCATION(fix) sh_force_relocation (fix)
extern int sh_force_relocation PARAMS ((struct fix *));
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/* This macro decides whether a particular reloc is an entry in a
switch table. It is used when relaxing, because the linker needs
to know about all such entries so that it can adjust them if
necessary. */
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#ifdef BFD_ASSEMBLER
#define SWITCH_TABLE_CONS(FIX) (0)
#else
#define SWITCH_TABLE_CONS(FIX) \
((FIX)->fx_r_type == 0 \
&& ((FIX)->fx_size == 2 \
|| (FIX)->fx_size == 1 \
|| (FIX)->fx_size == 4))
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#endif
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#define SWITCH_TABLE(FIX) \
((FIX)->fx_addsy != NULL \
&& (FIX)->fx_subsy != NULL \
&& S_GET_SEGMENT ((FIX)->fx_addsy) == text_section \
&& S_GET_SEGMENT ((FIX)->fx_subsy) == text_section \
&& ((FIX)->fx_r_type == BFD_RELOC_32 \
|| (FIX)->fx_r_type == BFD_RELOC_16 \
|| (FIX)->fx_r_type == BFD_RELOC_8 \
|| SWITCH_TABLE_CONS (FIX)))
#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEG) \
(! SEG_NORMAL (SEG) \
|| (sh_relax && SWITCH_TABLE (FIX)))
/* Don't complain when we leave fx_subsy around. */
#define TC_VALIDATE_FIX_SUB(FIX) \
(sh_relax && SWITCH_TABLE (FIX))
#define MD_PCREL_FROM_SECTION(FIX, SEC) md_pcrel_from_section (FIX, SEC)
extern long md_pcrel_from_section PARAMS ((struct fix *, segT));
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#define IGNORE_NONSTANDARD_ESCAPES
#define LISTING_HEADER \
(!target_big_endian \
? "Hitachi Super-H GAS Little Endian" : "Hitachi Super-H GAS Big Endian")
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#define md_operand(x)
extern const struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table
/* We record, for each section, whether we have most recently output a
CODE reloc or a DATA reloc. */
struct sh_segment_info_type
{
int in_code : 1;
};
#define TC_SEGMENT_INFO_TYPE struct sh_segment_info_type
/* We call a routine to emit a reloc for a label, so that the linker
can align loads and stores without crossing a label. */
extern void sh_frob_label PARAMS ((void));
#define tc_frob_label(sym) sh_frob_label ()
/* We call a routine to flush pending output in order to output a DATA
reloc when required. */
extern void sh_flush_pending_output PARAMS ((void));
#define md_flush_pending_output() sh_flush_pending_output ()
#ifdef BFD_ASSEMBLER
#define tc_frob_file_before_adjust sh_frob_file
#else
#define tc_frob_file sh_frob_file
#endif
extern void sh_frob_file PARAMS ((void));
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#ifdef OBJ_COFF
/* COFF specific definitions. */
#define DO_NOT_STRIP 0
/* This macro translates between an internal fix and an coff reloc type */
#define TC_COFF_FIX2RTYPE(fix) ((fix)->fx_r_type)
#define BFD_ARCH TARGET_ARCH
#define COFF_MAGIC (!target_big_endian ? SH_ARCH_MAGIC_LITTLE : SH_ARCH_MAGIC_BIG)
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/* We need to write out relocs which have not been completed. */
#define TC_COUNT_RELOC(fix) ((fix)->fx_addsy != NULL)
#define TC_RELOC_MANGLE(seg, fix, int, paddr) \
sh_coff_reloc_mangle ((seg), (fix), (int), (paddr))
extern void sh_coff_reloc_mangle
PARAMS ((struct segment_info_struct *, struct fix *,
struct internal_reloc *, unsigned int));
#define tc_coff_symbol_emit_hook(a) ; /* not used */
#define NEED_FX_R_TYPE 1
#define TC_KEEP_FX_OFFSET 1
#define TC_COFF_SIZEMACHDEP(frag) tc_coff_sizemachdep(frag)
extern int tc_coff_sizemachdep PARAMS ((fragS *));
#ifdef BFD_ASSEMBLER
#define SEG_NAME(SEG) segment_name (SEG)
#else
#define SEG_NAME(SEG) obj_segment_name (SEG)
#endif
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/* We align most sections to a 16 byte boundary. */
#define SUB_SEGMENT_ALIGN(SEG, FRCHAIN) \
(strncmp (SEG_NAME (SEG), ".stabstr", 8) == 0 \
? 0 \
: ((strncmp (SEG_NAME (SEG), ".stab", 5) == 0 \
|| strcmp (SEG_NAME (SEG), ".ctors") == 0 \
|| strcmp (SEG_NAME (SEG), ".dtors") == 0) \
? 2 \
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: (sh_small ? 2 : 4)))
#endif /* OBJ_COFF */
#ifdef OBJ_ELF
/* ELF specific definitions. */
/* Whether or not the target is big endian */
extern int target_big_endian;
#ifdef TE_LINUX
#define TARGET_FORMAT (!target_big_endian ? "elf32-sh-linux" : "elf32-shbig-linux")
#elif defined(TE_NetBSD)
#define TARGET_FORMAT (!target_big_endian ? "elf32-shl-nbsd" : "elf32-sh-nbsd")
#else
#define TARGET_FORMAT (!target_big_endian ? "elf32-shl" : "elf32-sh")
#endif
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bfd: Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
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#define elf_tc_final_processing sh_elf_final_processing
extern void sh_elf_final_processing PARAMS ((void));
#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
/* This is the relocation type for direct references to
GLOBAL_OFFSET_TABLE. It comes up in complicated expressions such
as _GLOBAL_OFFSET_TABLE_+[.-.L284], which cannot be expressed
normally with the regular expressions. The fixup specified here
when used at runtime implies that we should add the address of the
GOT to the specified location, and as a result we have simplified
the expression into something we can use. */
#define TC_RELOC_GLOBAL_OFFSET_TABLE BFD_RELOC_SH_GOTPC
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#define tc_fix_adjustable(FIX) sh_fix_adjustable(FIX)
extern bfd_boolean sh_fix_adjustable PARAMS ((struct fix *));
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/* Values passed to md_apply_fix3 don't include symbol values. */
#define MD_APPLY_SYM_VALUE(FIX) 0
/* This expression evaluates to true if the relocation is for a local object
for which we still want to do the relocation at runtime. False if we
are willing to perform this relocation while building the .o file.
We can't resolve references to the GOT or the PLT when creating the
object file, since these tables are only created by the linker.
Also, if the symbol is global, weak, common or not defined, the
assembler can't compute the appropriate reloc, since its location
can only be determined at link time. */
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#define TC_FORCE_RELOCATION_LOCAL(FIX) \
(!(FIX)->fx_pcrel \
|| (FIX)->fx_plt \
|| (FIX)->fx_r_type == BFD_RELOC_32_PLT_PCREL \
|| (FIX)->fx_r_type == BFD_RELOC_32_GOT_PCREL \
|| (FIX)->fx_r_type == BFD_RELOC_SH_GOTPC \
|| TC_FORCE_RELOCATION (FIX))
/* This keeps the subtracted symbol around, for use by PLT_PCREL
relocs. */
#define TC_FORCE_RELOCATION_SUB_ABS(FIX) \
((FIX)->fx_r_type == BFD_RELOC_32_PLT_PCREL \
|| S_FORCE_RELOC ((FIX)->fx_subsy))
/* Don't complain when we leave fx_subsy around. */
#undef TC_VALIDATE_FIX_SUB
#define TC_VALIDATE_FIX_SUB(FIX) \
((FIX)->fx_r_type == BFD_RELOC_32_PLT_PCREL \
|| (sh_relax && SWITCH_TABLE (FIX)))
#define md_parse_name(name, exprP, nextcharP) \
sh_parse_name ((name), (exprP), (nextcharP))
int sh_parse_name PARAMS ((char const *name,
expressionS *exprP,
char *nextchar));
#define TC_CONS_FIX_NEW(FRAG, OFF, LEN, EXP) \
sh_cons_fix_new ((FRAG), (OFF), (LEN), (EXP))
void sh_cons_fix_new PARAMS ((fragS *, int, int, expressionS *));
/* This is used to construct expressions out of @GOTOFF, @PLT and @GOT
symbols. The relocation type is stored in X_md. */
#define O_PIC_reloc O_md1
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#endif /* OBJ_ELF */