binutils-gdb/bfd/cpu-i860.c

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1999-05-03 15:29:11 +08:00
/* BFD support for the Intel 860 architecture.
Copyright 1992, 1995, 2000, 2002 Free Software Foundation, Inc.
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Created mostly by substituting "860" for "386" in cpu-i386.c
Harry Dolan <dolan@ssd.intel.com>, October 1995
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_i860_arch =
{
2000-07-22 Jason Eckhardt <jle@cygnus.com> * include/opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * include/elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * bfd/cpu-i860.c: Added comments. * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to bfd_elf32_i860_little_vec. (TARGET_LITTLE_NAME): Defined to "elf32-i860-little". (ELF_MAXPAGESIZE): Changed to 4096. * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of new target. (bfd_target_vector): Added bfd_elf32_i860_little_vec. * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added config for little endian elf32 i860. (targ_defvec): Define for the new config above as "bfd_elf32_i860_little_vec". (targ_selvecs): Define for the new config above as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec" * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition of new target vec. * bfd/configure: Regenerated. * opcodes/i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * opcodes/disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * include/dis-asm.h (print_insn_i860): Add prototype. * opcodes/Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * opcodes/configure.in: New bits for bfd_i860_arch. * opcodes/configure: Regenerated.
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32, /* 32 bits in a word */
32, /* 32 bits in an address */
8, /* 8 bits in a byte */
bfd_arch_i860, /* Architecture */
0, /* Only one machine */
"i860", /* Architecture name */
"i860", /* Printable name */
3, /* Section alignment exponent */
TRUE, /* Is this the default architecture? */
2000-07-22 Jason Eckhardt <jle@cygnus.com> * include/opcode/i860.h (btne, bte, bla): Changed these opcodes to use sbroff ('r') instead of split16 ('s'). (J, K, L, M): New operand types for 16-bit aligned fields. (ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to use I, J, K, L, M instead of just I. (T, U): New operand types for split 16-bit aligned fields. (st.x): Changed these opcodes to use S, T, U instead of just S. (andh, andnoth, orh, xorh): Deleted 3-register forms as they do not exist on the i860. (pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860. (pfeq.ss, pfeq.dd): New opcodes. (st.s): Fixed incorrect mask bits. (fmlow): Fixed incorrect mask bits. (fzchkl, pfzchkl): Fixed incorrect mask bits. (faddz, pfaddz): Fixed incorrect mask bits. (form, pform): Fixed incorrect mask bits. (pfld.l): Fixed incorrect mask bits. (fst.q): Fixed incorrect mask bits. (all floating point opcodes): Fixed incorrect mask bits for handling of dual bit. * include/elf/i860.h: New file. (elf_i860_reloc_type): Defined ELF32 i860 relocations. * bfd/cpu-i860.c: Added comments. * bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to bfd_elf32_i860_little_vec. (TARGET_LITTLE_NAME): Defined to "elf32-i860-little". (ELF_MAXPAGESIZE): Changed to 4096. * bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of new target. (bfd_target_vector): Added bfd_elf32_i860_little_vec. * bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added config for little endian elf32 i860. (targ_defvec): Define for the new config above as "bfd_elf32_i860_little_vec". (targ_selvecs): Define for the new config above as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec" * bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition of new target vec. * bfd/configure: Regenerated. * opcodes/i860-dis.c: New file. (print_insn_i860): New function. (print_br_address): New function. (sign_extend): New function. (BITWISE_OP): New macro. (I860_REG_PREFIX): New macro. (grnames, frnames, crnames): New structures. * opcodes/disassemble.c (ARCH_i860): Define. (disassembler): Add check for bfd_arch_i860 to set disassemble function to print_insn_i860. * include/dis-asm.h (print_insn_i860): Add prototype. * opcodes/Makefile.in (CFILES): Added i860-dis.c. (ALL_MACHINES): Added i860-dis.lo. (i860-dis.lo): New dependences. * opcodes/configure.in: New bits for bfd_i860_arch. * opcodes/configure: Regenerated.
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bfd_default_compatible,
bfd_default_scan,
0, /* Next in list */
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};