2023-01-20 10:15:48 +01:00
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/* This file is automatically generated by i386-gen. Do not edit! */
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2025-01-01 18:17:28 +10:30
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/* Copyright (C) 2007-2025 Free Software Foundation, Inc.
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2023-01-20 10:15:48 +01:00
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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extern const char i386_mnemonics[];
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2023-01-20 10:16:17 +01:00
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#define MN_ud0 0x1
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#define MN_prefetcht0 0x5
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#define MN_prefetchit0 0x10
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Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_t2rpntlvwz0 0x1c
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#define MN_xsha1 0x28
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#define MN_fld1 0x2e
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#define MN_ud1 0x33
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#define MN_sha1msg1 0x37
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#define MN_vsha512msg1 0x40
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#define MN_vsm3msg1 0x4c
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#define MN_sha256msg1 0x55
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#define MN_fprem1 0x60
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#define MN_f2xm1 0x67
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#define MN_fyl2xp1 0x6d
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#define MN_t2rpntlvwz0t1 0x75
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#define MN_t2rpntlvwz1t1 0x83
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#define MN_tileloaddt1 0x91
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#define MN_prefetcht1 0x9d
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#define MN_prefetchit1 0xa8
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#define MN_pfrcpit1 0xb4
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#define MN_pfrsqit1 0xbd
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#define MN_int1 0xc6
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#define MN_prefetchwt1 0xcb
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#define MN_t2rpntlvwz1 0xd7
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#define MN_vmovdqa32 0xe3
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#define MN_data32 0xed
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#define MN_crc32 0xf4
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#define MN_endbr32 0xfa
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#define MN_addr32 0x102
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#define MN_vmovdqu32 0x109
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#define MN_ud2 0x113
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#define MN_fldlg2 0x117
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#define MN_sha1msg2 0x11e
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#define MN_vsha512msg2 0x127
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#define MN_vsm3msg2 0x133
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#define MN_sha256msg2 0x13c
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#define MN_push2 0x147
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#define MN_sm2 0x14d
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#define MN_fldln2 0x151
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#define MN_pop2 0x158
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#define MN_vsha512rnds2 0x15d
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#define MN_vsm3rnds2 0x16a
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#define MN_sha256rnds2 0x174
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#define MN_prefetcht2 0x180
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#define MN_pfrcpit2 0x18b
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#define MN_vbroadcastf32x2 0x194
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#define MN_vbroadcasti32x2 0x1a4
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#define MN_vshuff64x2 0x1b4
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#define MN_vextractf64x2 0x1bf
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#define MN_vinsertf64x2 0x1cd
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#define MN_vbroadcastf64x2 0x1da
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#define MN_vshufi64x2 0x1ea
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#define MN_vextracti64x2 0x1f5
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#define MN_vinserti64x2 0x203
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#define MN_vbroadcasti64x2 0x210
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#define MN_sm3 0x220
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#define MN_int3 0x224
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#define MN_vmovdqa64 0x229
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#define MN_xsavec64 0x233
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2023-01-20 10:16:17 +01:00
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#define MN_xsave64 (MN_fxsave64 + 1)
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Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_fxsave64 0x23c
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#define MN_endbr64 0x245
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2023-01-20 10:16:17 +01:00
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#define MN_xrstor64 (MN_fxrstor64 + 1)
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Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_fxrstor64 0x24d
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#define MN_xsaves64 0x257
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#define MN_xrstors64 0x260
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#define MN_xsaveopt64 0x26a
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#define MN_vmovdqu64 0x275
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#define MN_rex64 0x27f
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#define MN_sm4 0x285
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#define MN_sha1rnds4 0x289
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#define MN_vsm4rnds4 0x293
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#define MN_vshuff32x4 0x29d
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#define MN_vextractf32x4 0x2a8
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#define MN_vinsertf32x4 0x2b6
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#define MN_vbroadcastf32x4 0x2c3
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#define MN_vshufi32x4 0x2d3
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#define MN_vextracti32x4 0x2de
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#define MN_vinserti32x4 0x2ec
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#define MN_vbroadcasti32x4 0x2f9
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#define MN_vextractf64x4 0x309
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#define MN_vinsertf64x4 0x317
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#define MN_vbroadcastf64x4 0x324
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#define MN_vextracti64x4 0x334
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#define MN_vinserti64x4 0x342
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#define MN_vbroadcasti64x4 0x34f
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#define MN_vsm4key4 0x35f
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#define MN_data16 0x368
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#define MN_vcvtne2ps2bf16 0x36f
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#define MN_vcvtneps2bf16 0x37e
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#define MN_vfmsub231nepbf16 0x38c
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#define MN_vfnmsub231nepbf16 0x39d
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#define MN_vfmadd231nepbf16 0x3af
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#define MN_vfnmadd231nepbf16 0x3c0
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#define MN_vfmsub132nepbf16 0x3d2
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#define MN_vfnmsub132nepbf16 0x3e3
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#define MN_vfmadd132nepbf16 0x3f5
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#define MN_vfnmadd132nepbf16 0x406
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#define MN_vfmsub213nepbf16 0x418
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#define MN_vfnmsub213nepbf16 0x429
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#define MN_vfmadd213nepbf16 0x43b
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#define MN_vfnmadd213nepbf16 0x44c
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#define MN_vsubnepbf16 0x45e
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#define MN_vaddnepbf16 0x46a
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#define MN_vreducenepbf16 0x476
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#define MN_vrndscalenepbf16 0x485
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#define MN_vscalefnepbf16 0x496
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#define MN_vmulnepbf16 0x4a5
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#define MN_vsqrtnepbf16 0x4b1
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#define MN_vdivnepbf16 0x4be
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#define MN_vminpbf16 0x4ca
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#define MN_vrcppbf16 0x4d4
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#define MN_vcmppbf16 0x4de
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#define MN_vgetexppbf16 0x4e8
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#define MN_vfpclasspbf16 0x4f5
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#define MN_vgetmantpbf16 0x503
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#define MN_vrsqrtpbf16 0x511
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#define MN_vminmaxpbf16 0x51d
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#define MN_vmaxpbf16 0x52a
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#define MN_vcomsbf16 0x534
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#define MN_tconjtfp16 0x53e
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#define MN_addr16 0x549
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#define MN_vmovdqu16 0x550
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#define MN_xsha256 0x55a
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#define MN_encodekey256 0x562
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#define MN_vperm2f128 0x56f
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#define MN_vextractf128 0x57a
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#define MN_vinsertf128 0x587
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#define MN_vbroadcastf128 0x593
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#define MN_vperm2i128 0x5a2
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#define MN_vextracti128 0x5ad
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#define MN_vinserti128 0x5ba
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#define MN_vbroadcasti128 0x5c6
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#define MN_encodekey128 0x5d5
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#define MN_vcvtne2ph2bf8 0x5e2
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#define MN_vcvtneph2bf8 0x5f0
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#define MN_vcvtbiasph2bf8 0x5fd
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#define MN_vcvtne2ph2hf8 0x60c
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#define MN_vcvtneph2hf8 0x61a
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#define MN_vcvtbiasph2hf8 0x627
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#define MN_vmovdqu8 0x636
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#define MN_vextractf32x8 0x63f
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#define MN_vinsertf32x8 0x64d
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#define MN_vbroadcastf32x8 0x65a
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#define MN_vextracti32x8 0x66a
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#define MN_vinserti32x8 0x678
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#define MN_vbroadcasti32x8 0x685
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#define MN_ud2a 0x695
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#define MN_aaa 0x69a
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#define MN_daa 0x69e
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#define MN_ssca 0x6a2
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#define MN_lea 0x6a7
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#define MN_invlpga 0x6ab
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#define MN_pusha 0x6b3
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#define MN_ja 0x6b9
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#define MN_jna 0x6bc
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#define MN_ccmpna 0x6c0
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#define MN_setna 0x6c7
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#define MN_ctestna 0x6cd
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#define MN_setzuna 0x6d5
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2023-01-20 10:16:17 +01:00
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#define MN_cmovna (MN_fcmovna + 1)
|
2024-07-04 15:49:16 +08:00
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#define MN_fcmovna (MN_cfcmovna + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovna 0x6dd
|
|
|
|
#define MN_ccmpa 0x6e6
|
|
|
|
#define MN_popa 0x6ec
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movntdqa (MN_vmovntdqa + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovntdqa 0x6f1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movdqa (MN_vmovdqa + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovdqa 0x6fb
|
|
|
|
#define MN_seta 0x703
|
|
|
|
#define MN_prefetchnta 0x708
|
|
|
|
#define MN_ctesta 0x714
|
|
|
|
#define MN_setzua 0x71b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmova (MN_fcmova + 1)
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_fcmova (MN_cfcmova + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmova 0x722
|
|
|
|
#define MN_rex_b 0x72a
|
|
|
|
#define MN_ud2b 0x730
|
|
|
|
#define MN_vpermi2b 0x735
|
|
|
|
#define MN_vpmovm2b 0x73e
|
|
|
|
#define MN_vpermt2b 0x747
|
|
|
|
#define MN_movdir64b 0x750
|
|
|
|
#define MN_cmpxchg16b 0x75a
|
|
|
|
#define MN_cmpxchg8b 0x765
|
|
|
|
#define MN_vpshab 0x76f
|
|
|
|
#define MN_sbb 0x776
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psubb (MN_vpsubb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsubb 0x77a
|
|
|
|
#define MN_xcrypt_ecb 0x781
|
|
|
|
#define MN_xcryptecb 0x78c
|
|
|
|
#define MN_llwpcb 0x796
|
|
|
|
#define MN_slwpcb 0x79d
|
|
|
|
#define MN_kaddb 0x7a4
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_paddb (MN_vpaddb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpaddb 0x7aa
|
|
|
|
#define MN_kandb 0x7b1
|
|
|
|
#define MN_vpexpandb 0x7b7
|
|
|
|
#define MN_vpmovusdb 0x7c1
|
|
|
|
#define MN_vpmovsdb 0x7cb
|
|
|
|
#define MN_vpmovdb 0x7d4
|
|
|
|
#define MN_vpcomgeb 0x7dc
|
|
|
|
#define MN_vpcomleb 0x7e5
|
|
|
|
#define MN_vpcmpnleb 0x7ee
|
|
|
|
#define MN_vpcmpleb 0x7f8
|
|
|
|
#define MN_vpcomfalseb 0x801
|
|
|
|
#define MN_vpcomtrueb 0x80d
|
|
|
|
#define MN_xcrypt_cfb 0x818
|
|
|
|
#define MN_xcryptcfb 0x823
|
|
|
|
#define MN_xcrypt_ofb 0x82d
|
|
|
|
#define MN_xcryptofb 0x838
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pshufb (MN_vpshufb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpshufb 0x842
|
|
|
|
#define MN_invlpgb 0x84a
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pavgb (MN_vpavgb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpavgb 0x852
|
|
|
|
#define MN_jb 0x859
|
|
|
|
#define MN_pbndkb 0x85c
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmovmskb (MN_vpmovmskb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmovmskb 0x863
|
|
|
|
#define MN_vpshlb 0x86d
|
|
|
|
#define MN_kshiftlb 0x874
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_gf2p8mulb (MN_vgf2p8mulb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vgf2p8mulb 0x87d
|
|
|
|
#define MN_vpblendmb 0x888
|
|
|
|
#define MN_vptestnmb 0x892
|
|
|
|
#define MN_vpcomb 0x89c
|
|
|
|
#define MN_vpshufbitqmb 0x8a3
|
|
|
|
#define MN_vpermb 0x8b0
|
|
|
|
#define MN_vptestmb 0x8b7
|
|
|
|
#define MN_kandnb 0x8c0
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psignb (MN_vpsignb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsignb 0x8c7
|
|
|
|
#define MN_jnb 0x8cf
|
|
|
|
#define MN_ccmpnb 0x8d3
|
|
|
|
#define MN_setnb 0x8da
|
|
|
|
#define MN_ctestnb 0x8e0
|
|
|
|
#define MN_setzunb 0x8e8
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmovnb (MN_fcmovnb + 1)
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_fcmovnb (MN_cfcmovnb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovnb 0x8f0
|
|
|
|
#define MN_ccmpb 0x8f9
|
|
|
|
#define MN_vpcmpb 0x8ff
|
|
|
|
#define MN_vpcomeqb 0x906
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_gf2p8affineqb (MN_vgf2p8affineqb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vgf2p8affineqb 0x90f
|
|
|
|
#define MN_vpcomneqb 0x91e
|
|
|
|
#define MN_vpcmpneqb 0x928
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pcmpeqb (MN_vpcmpeqb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpcmpeqb 0x932
|
|
|
|
#define MN_vpmovusqb 0x93b
|
|
|
|
#define MN_vpmovsqb 0x945
|
|
|
|
#define MN_vpmultishiftqb 0x94e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_gf2p8affineinvqb (MN_vgf2p8affineinvqb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vgf2p8affineinvqb 0x95d
|
|
|
|
#define MN_vpmovqb 0x96f
|
|
|
|
#define MN_rex_rb 0x977
|
|
|
|
#define MN_korb 0x97e
|
|
|
|
#define MN_kxnorb 0x983
|
|
|
|
#define MN_kxorb 0x98a
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pinsrb (MN_vpinsrb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpinsrb 0x990
|
|
|
|
#define MN_kshiftrb 0x998
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pextrb (MN_vpextrb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpextrb 0x9a1
|
|
|
|
#define MN_rex_wrb 0x9a9
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pabsb (MN_vpabsb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpabsb 0x9b1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psubsb (MN_vpsubsb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsubsb 0x9b8
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_paddsb (MN_vpaddsb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpaddsb 0x9c0
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pminsb (MN_vpminsb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpminsb 0x9c8
|
|
|
|
#define MN_vpcompressb 0x9d0
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psubusb (MN_vpsubusb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsubusb 0x9dc
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_paddusb (MN_vpaddusb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpaddusb 0x9e5
|
|
|
|
#define MN_pavgusb 0x9ee
|
|
|
|
#define MN_movsb 0x9f6
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmaxsb (MN_vpmaxsb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
|
#define MN_vpmaxsb 0x9fc
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|
|
|
#define MN_setb 0xa04
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|
|
|
#define MN_vpcomgtb 0xa09
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pcmpgtb (MN_vpcmpgtb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpcmpgtb 0xa12
|
|
|
|
#define MN_vpcomltb 0xa1b
|
|
|
|
#define MN_vpcmpnltb 0xa24
|
|
|
|
#define MN_vpcmpltb 0xa2e
|
|
|
|
#define MN_vpopcntb 0xa37
|
|
|
|
#define MN_knotb 0xa40
|
|
|
|
#define MN_vprotb 0xa46
|
|
|
|
#define MN_vpbroadcastb 0xa4d
|
|
|
|
#define MN_ctestb 0xa5a
|
|
|
|
#define MN_ktestb 0xa61
|
|
|
|
#define MN_kortestb 0xa68
|
|
|
|
#define MN_vpcomgeub 0xa71
|
|
|
|
#define MN_vpcomleub 0xa7b
|
|
|
|
#define MN_vpcmpnleub 0xa85
|
|
|
|
#define MN_vpcmpleub 0xa90
|
|
|
|
#define MN_vpcomfalseub 0xa9a
|
|
|
|
#define MN_vpcomtrueub 0xaa7
|
|
|
|
#define MN_vpcomub 0xab3
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pminub (MN_vpminub + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpminub 0xabb
|
|
|
|
#define MN_vpcmpub 0xac3
|
|
|
|
#define MN_vpcomequb 0xacb
|
|
|
|
#define MN_vpcomnequb 0xad5
|
|
|
|
#define MN_vpcmpnequb 0xae0
|
|
|
|
#define MN_vpcmpequb 0xaeb
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_sub (MN_fsub + 1)
|
|
|
|
#define MN_fsub (MN_pfsub + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_pfsub 0xaf5
|
|
|
|
#define MN_fisub 0xafb
|
|
|
|
#define MN_vpcomgtub 0xb01
|
|
|
|
#define MN_vpcomltub 0xb0b
|
|
|
|
#define MN_vpcmpnltub 0xb15
|
|
|
|
#define MN_vpcmpltub 0xb20
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmaxub (MN_vpmaxub + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmaxub 0xb2a
|
|
|
|
#define MN_setzub 0xb32
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pblendvb (MN_vpblendvb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpblendvb 0xb39
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmovb (MN_fcmovb + 1)
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_fcmovb (MN_cfcmovb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovb 0xb43
|
|
|
|
#define MN_kmovb 0xb4b
|
|
|
|
#define MN_rex_wb 0xb51
|
|
|
|
#define MN_clwb 0xb58
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_packsswb (MN_vpacksswb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpacksswb 0xb5d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_packuswb (MN_vpackuswb + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpackuswb 0xb67
|
|
|
|
#define MN_vpmovuswb 0xb71
|
|
|
|
#define MN_vpmovswb 0xb7b
|
|
|
|
#define MN_vpmovwb 0xb84
|
|
|
|
#define MN_rex_xb 0xb8c
|
|
|
|
#define MN_rex_rxb 0xb93
|
|
|
|
#define MN_rex_wrxb 0xb9b
|
|
|
|
#define MN_rex_wxb 0xba4
|
|
|
|
#define MN_movzb 0xbac
|
|
|
|
#define MN_clac 0xbb2
|
|
|
|
#define MN_stac 0xbb7
|
|
|
|
#define MN_xcrypt_cbc 0xbbc
|
|
|
|
#define MN_xcryptcbc 0xbc7
|
|
|
|
#define MN_pfacc 0xbd1
|
|
|
|
#define MN_pfnacc 0xbd7
|
|
|
|
#define MN_pfpnacc 0xbde
|
|
|
|
#define MN_adc 0xbe6
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_dec (MN_aesdec + 3)
|
|
|
|
#define MN_aesdec (MN_vaesdec + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vaesdec 0xbea
|
|
|
|
#define MN_getsec 0xbf2
|
|
|
|
#define MN_xsavec 0xbf9
|
|
|
|
#define MN_blcic 0xc00
|
|
|
|
#define MN_blsic 0xc06
|
|
|
|
#define MN_jc 0xc0c
|
|
|
|
#define MN_t1mskc 0xc0f
|
|
|
|
#define MN_clc 0xc16
|
|
|
|
#define MN_cmc 0xc1a
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_aesimc (MN_vaesimc + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vaesimc 0xc1e
|
|
|
|
#define MN_rdpmc 0xc26
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_aesenc (MN_vaesenc + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vaesenc 0xc2c
|
|
|
|
#define MN_inc 0xc34
|
|
|
|
#define MN_jnc 0xc38
|
|
|
|
#define MN_ccmpnc 0xc3c
|
|
|
|
#define MN_setnc 0xc43
|
|
|
|
#define MN_ctestnc 0xc49
|
|
|
|
#define MN_vmfunc 0xc51
|
|
|
|
#define MN_setzunc 0xc58
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovnc (MN_cfcmovnc + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovnc 0xc60
|
|
|
|
#define MN_tlbsync 0xc69
|
|
|
|
#define MN_ccmpc 0xc71
|
|
|
|
#define MN_rdtsc 0xc77
|
|
|
|
#define MN_btc 0xc7d
|
|
|
|
#define MN_setc 0xc81
|
Support APX CCMP and CTEST
CCMP and CTEST are two new sets of instructions for conditional CMP
and TEST, SCC and OSZC flags are given as suffixes of CCMP or CTEST
in the instruction mnemonic, e.g.:
ccmp<cc> { dfv=sf , cf , of } %eax, %ecx
also add
{evex} cmp/test %eax, %ecx
as an alias for ccmpt.
For the encoder part, add function check_Scc_OszcOperation to parse
'{ dfv=of , sf, sf, cf}', store scc in the lower 4 bits of base_opcode,
and adjust base_opcode to its normal meaning in install_template.
For the decoder part, add 'SC' and 'DF' macros to add scc and oszc flags
suffixes.
gas/ChangeLog:
* config/tc-i386.c (OSZC_CF): New.
(OSZC_ZF): Ditto.
(OSZC_SF): Ditto.
(OSZC_OF): Ditto.
(set_oszc_flags): Set oszc flags and report error for using the same oszc flags twice.
(check_Scc_OszcOperations): Handle SCC OSZC flags.
(install_template): Add scc and oszc_flags.
(build_apx_evex_prefix): Encode SCC and oszc flags bits.
(parse_insn): Handle check_Scc_OszcOperations.
* testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d: Add ivalid test case.
* testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s: Ditto.
* testsuite/gas/i386/x86-64.exp: Add test for ccmp and ctest.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest-intel.d: New test.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest-inval.l: Ditto.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest-inval.s: Ditto.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest.d: Ditto.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest.s: Ditto.
opcodes/ChangeLog:
* i386-dis-evex-reg.h: Add ccmp and ctest.
* i386-dis-evex.h: Ditto.
* i386-dis.c (struct instr_info): add scc.
(struct dis386): Add new micro 'NE','SC' and'DF'.
(get_valid_dis386): Get scc value and move MAP4 invalid check to print_insn.
(putop): Handle %NE, %SC and %DF.
* i386-opc.h (SCC): New.
* i386-opc.tbl: Add ccmp/ctest and evex format for cmp/test.
* i386-mnem.h: Regenerated.
* i386-tbl.h: Ditto.
2024-06-18 10:45:49 +08:00
|
|
|
#define MN_stc (MN_ctestc + 3)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_ctestc 0xc86
|
|
|
|
#define MN_setzuc 0xc8d
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovc (MN_cfcmovc + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_cfcmovc 0xc94
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#define MN_vpermi2d 0xc9c
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#define MN_vpmovm2d 0xca5
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#define MN_vpermt2d 0xcae
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#define MN_vpbroadcastmw2d 0xcb7
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#define MN_aad 0xcc7
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#define MN_vmread 0xccb
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#define MN_vpshad 0xcd2
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#define MN_vmload 0xcd9
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2023-01-20 10:16:17 +01:00
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#define MN_psrad (MN_vpsrad + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vpsrad 0xce0
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#define MN_vphaddbd 0xce7
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#define MN_vphaddubd 0xcf0
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2023-01-20 10:16:17 +01:00
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#define MN_phsubd (MN_vphsubd + 1)
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Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vphsubd 0xcfa
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2023-01-20 10:16:17 +01:00
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#define MN_psubd (MN_vpsubd + 1)
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Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vpsubd 0xd02
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2023-01-20 10:16:17 +01:00
|
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|
#define MN_pmovsxbd (MN_vpmovsxbd + 1)
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Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vpmovsxbd 0xd09
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmovzxbd (MN_vpmovzxbd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmovzxbd 0xd13
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_add (MN_aadd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_aadd 0xd1d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_fadd (MN_pfadd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_pfadd 0xd22
|
|
|
|
#define MN_fiadd 0xd28
|
|
|
|
#define MN_tileloadd 0xd2e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_xadd (MN_cmpnaxadd + 5)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cmpnaxadd 0xd38
|
|
|
|
#define MN_cmpaxadd 0xd42
|
|
|
|
#define MN_cmpnbxadd 0xd4b
|
|
|
|
#define MN_cmpbxadd 0xd55
|
|
|
|
#define MN_cmpncxadd 0xd5e
|
|
|
|
#define MN_cmpcxadd 0xd68
|
|
|
|
#define MN_cmpnaexadd 0xd71
|
|
|
|
#define MN_cmpaexadd 0xd7c
|
|
|
|
#define MN_cmpnbexadd 0xd86
|
|
|
|
#define MN_cmpbexadd 0xd91
|
|
|
|
#define MN_cmpngexadd 0xd9b
|
|
|
|
#define MN_cmpgexadd 0xda6
|
|
|
|
#define MN_cmpnlexadd 0xdb0
|
|
|
|
#define MN_cmplexadd 0xdbb
|
|
|
|
#define MN_cmpnexadd 0xdc5
|
|
|
|
#define MN_cmpexadd 0xdcf
|
|
|
|
#define MN_cmppexadd 0xdd8
|
|
|
|
#define MN_cmpngxadd 0xde2
|
|
|
|
#define MN_cmpgxadd 0xdec
|
|
|
|
#define MN_cmpnlxadd 0xdf5
|
|
|
|
#define MN_cmplxadd 0xdff
|
|
|
|
#define MN_cmpnoxadd 0xe08
|
|
|
|
#define MN_cmpoxadd 0xe12
|
|
|
|
#define MN_cmppoxadd 0xe1b
|
|
|
|
#define MN_cmpnpxadd 0xe25
|
|
|
|
#define MN_cmppxadd 0xe2f
|
|
|
|
#define MN_cmpnsxadd 0xe38
|
|
|
|
#define MN_cmpsxadd 0xe42
|
|
|
|
#define MN_cmpnzxadd 0xe4b
|
|
|
|
#define MN_cmpzxadd 0xe55
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_phaddd (MN_vphaddd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vphaddd 0xe5e
|
|
|
|
#define MN_kaddd 0xe66
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_paddd (MN_vpaddd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpaddd 0xe6c
|
|
|
|
#define MN_vpshldd 0xe73
|
|
|
|
#define MN_kandd 0xe7b
|
|
|
|
#define MN_vpandd 0xe81
|
|
|
|
#define MN_vpexpandd 0xe88
|
|
|
|
#define MN_vpblendd 0xe92
|
|
|
|
#define MN_vpgatherdd 0xe9b
|
|
|
|
#define MN_vpscatterdd 0xea6
|
|
|
|
#define MN_vpshrdd 0xeb2
|
|
|
|
#define MN_vpmacsdd 0xeba
|
|
|
|
#define MN_vpmacssdd 0xec3
|
|
|
|
#define MN_rdseed 0xecd
|
|
|
|
#define MN_vpcomged 0xed4
|
|
|
|
#define MN_vpcomled 0xedd
|
|
|
|
#define MN_vpcmpnled 0xee6
|
|
|
|
#define MN_vpcmpled 0xef0
|
|
|
|
#define MN_tilestored 0xef9
|
|
|
|
#define MN_vpcomfalsed 0xf04
|
|
|
|
#define MN_ttransposed 0xf10
|
|
|
|
#define MN_vpcomtrued 0xf1c
|
|
|
|
#define MN_pi2fd 0xf27
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pshufd (MN_vpshufd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpshufd 0xf2d
|
|
|
|
#define MN_vpternlogd 0xf35
|
|
|
|
#define MN_pf2id 0xf40
|
|
|
|
#define MN_invpcid 0xf46
|
|
|
|
#define MN_rdpid 0xf4e
|
|
|
|
#define MN_invvpid 0xf54
|
|
|
|
#define MN_cpuid 0xf5c
|
|
|
|
#define MN_fbld 0xf62
|
|
|
|
#define MN_cld 0xf67
|
|
|
|
#define MN_fld 0xf6b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_shld (MN_vpshld + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpshld 0xf6f
|
|
|
|
#define MN_fild 0xf76
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pslld (MN_vpslld + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpslld 0xf7b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmulld (MN_vpmulld + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmulld 0xf82
|
|
|
|
#define MN_vprold 0xf8a
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psrld (MN_vpsrld + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsrld 0xf91
|
|
|
|
#define MN_vmptrld 0xf98
|
|
|
|
#define MN_kshiftld 0xfa0
|
|
|
|
#define MN_enqcmd 0xfa9
|
|
|
|
#define MN_vpblendmd 0xfb0
|
|
|
|
#define MN_vptestnmd 0xfba
|
|
|
|
#define MN_vpcomd 0xfc4
|
|
|
|
#define MN_vpermd 0xfcb
|
|
|
|
#define MN_vptestmd 0xfd2
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_and (MN_aand + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_aand 0xfdb
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pand (MN_vpand + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpand 0xfe0
|
|
|
|
#define MN_rdrand 0xfe6
|
|
|
|
#define MN_bnd 0xfed
|
|
|
|
#define MN_kandnd 0xff1
|
|
|
|
#define MN_vpandnd 0xff8
|
|
|
|
#define MN_xend 0x1000
|
|
|
|
#define MN_valignd 0x1005
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psignd (MN_vpsignd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsignd 0x100d
|
|
|
|
#define MN_bound 0x1015
|
|
|
|
#define MN_slod 0x101b
|
|
|
|
#define MN_vfmaddsub231pd 0x1020
|
|
|
|
#define MN_vfmsub231pd 0x102f
|
|
|
|
#define MN_vfnmsub231pd 0x103b
|
|
|
|
#define MN_vfmsubadd231pd 0x1048
|
|
|
|
#define MN_vfmadd231pd 0x1057
|
|
|
|
#define MN_vfnmadd231pd 0x1063
|
|
|
|
#define MN_vfmaddsub132pd 0x1070
|
|
|
|
#define MN_vfmsub132pd 0x107f
|
|
|
|
#define MN_vfnmsub132pd 0x108b
|
|
|
|
#define MN_vfmsubadd132pd 0x1098
|
|
|
|
#define MN_vfmadd132pd 0x10a7
|
|
|
|
#define MN_vfnmadd132pd 0x10b3
|
|
|
|
#define MN_vcvtph2pd 0x10c0
|
|
|
|
#define MN_vpermi2pd 0x10ca
|
|
|
|
#define MN_cvtpi2pd 0x10d4
|
|
|
|
#define MN_vpermil2pd 0x10dd
|
|
|
|
#define MN_vexp2pd 0x10e8
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvtdq2pd (MN_vcvtdq2pd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvtdq2pd 0x10f0
|
|
|
|
#define MN_vcvtudq2pd 0x10fa
|
|
|
|
#define MN_vcvtqq2pd 0x1105
|
|
|
|
#define MN_vcvtuqq2pd 0x110f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvtps2pd (MN_vcvtps2pd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvtps2pd 0x111a
|
|
|
|
#define MN_vpermt2pd 0x1124
|
|
|
|
#define MN_vfmaddsub213pd 0x112e
|
|
|
|
#define MN_vfmsub213pd 0x113d
|
|
|
|
#define MN_vfnmsub213pd 0x1149
|
|
|
|
#define MN_vfmsubadd213pd 0x1156
|
|
|
|
#define MN_vfmadd213pd 0x1165
|
|
|
|
#define MN_vfnmadd213pd 0x1171
|
|
|
|
#define MN_vrcp14pd 0x117e
|
|
|
|
#define MN_vrsqrt14pd 0x1187
|
|
|
|
#define MN_vrcp28pd 0x1192
|
|
|
|
#define MN_vrsqrt28pd 0x119b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movapd (MN_vmovapd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovapd 0x11a6
|
|
|
|
#define MN_pswapd 0x11ae
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_subpd (MN_addsubpd + 3)
|
|
|
|
#define MN_addsubpd (MN_vfmaddsubpd + 3)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vfmaddsubpd 0x11b5
|
|
|
|
#define MN_vaddsubpd 0x11c1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_hsubpd (MN_vhsubpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vhsubpd 0x11cb
|
|
|
|
#define MN_vfmsubpd 0x11d3
|
|
|
|
#define MN_vfnmsubpd 0x11dc
|
|
|
|
#define MN_vsubpd 0x11e6
|
|
|
|
#define MN_vgatherpf0dpd 0x11ed
|
|
|
|
#define MN_vscatterpf0dpd 0x11fb
|
|
|
|
#define MN_vgatherpf1dpd 0x120a
|
|
|
|
#define MN_vscatterpf1dpd 0x1218
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_addpd (MN_vfmsubaddpd + 6)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vfmsubaddpd 0x1227
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_haddpd (MN_vhaddpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vhaddpd 0x1233
|
|
|
|
#define MN_vfmaddpd 0x123b
|
|
|
|
#define MN_vfnmaddpd 0x1244
|
|
|
|
#define MN_vaddpd 0x124e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_andpd (MN_vexpandpd + 4)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vexpandpd 0x1255
|
|
|
|
#define MN_vandpd 0x125f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_blendpd (MN_vblendpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vblendpd 0x1266
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_roundpd (MN_vroundpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vroundpd 0x126f
|
|
|
|
#define MN_vgatherdpd 0x1278
|
|
|
|
#define MN_vscatterdpd 0x1283
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpunordpd (MN_vcmpunordpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpunordpd 0x128f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpordpd (MN_vcmpordpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpordpd 0x129b
|
|
|
|
#define MN_vreducepd 0x12a5
|
|
|
|
#define MN_vrangepd 0x12af
|
|
|
|
#define MN_vcmpngepd 0x12b8
|
|
|
|
#define MN_vcmpgepd 0x12c2
|
|
|
|
#define MN_vrndscalepd 0x12cb
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpnlepd (MN_vcmpnlepd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpnlepd 0x12d7
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmplepd (MN_vcmplepd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmplepd 0x12e1
|
|
|
|
#define MN_vcmpfalsepd 0x12ea
|
|
|
|
#define MN_vcmptruepd 0x12f6
|
|
|
|
#define MN_vscalefpd 0x1301
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_shufpd (MN_vshufpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vshufpd 0x130b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_unpckhpd (MN_vunpckhpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vunpckhpd 0x1313
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movhpd (MN_vmovhpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovhpd 0x131d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movmskpd (MN_vmovmskpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovmskpd 0x1325
|
|
|
|
#define MN_vpermilpd 0x132f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_unpcklpd (MN_vunpcklpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vunpcklpd 0x1339
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_mulpd (MN_vmulpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmulpd 0x1343
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movlpd (MN_vmovlpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovlpd 0x134a
|
|
|
|
#define MN_vpcmpd 0x1352
|
|
|
|
#define MN_vblendmpd 0x1359
|
|
|
|
#define MN_vfixupimmpd 0x1363
|
|
|
|
#define MN_vpermpd 0x136f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_andnpd (MN_vandnpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vandnpd 0x1377
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_minpd (MN_vminpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vminpd 0x137f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_dppd (MN_vdppd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vdppd 0x1386
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmppd (MN_vcmppd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmppd 0x138c
|
|
|
|
#define MN_vgetexppd 0x1393
|
|
|
|
#define MN_vgatherpf0qpd 0x139d
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|
|
|
#define MN_vscatterpf0qpd 0x13ab
|
|
|
|
#define MN_vgatherpf1qpd 0x13ba
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|
|
|
#define MN_vscatterpf1qpd 0x13c8
|
|
|
|
#define MN_vcmpunord_qpd 0x13d7
|
|
|
|
#define MN_vcmpord_qpd 0x13e5
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpneqpd (MN_vcmpneqpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpneqpd 0x13f1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpeqpd (MN_vcmpeqpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpeqpd 0x13fb
|
|
|
|
#define MN_vcmpge_oqpd 0x1404
|
|
|
|
#define MN_vcmple_oqpd 0x1410
|
|
|
|
#define MN_vcmpfalse_oqpd 0x141c
|
|
|
|
#define MN_vcmpneq_oqpd 0x142b
|
|
|
|
#define MN_vcmpeq_oqpd 0x1438
|
|
|
|
#define MN_vcmpgt_oqpd 0x1444
|
|
|
|
#define MN_vcmplt_oqpd 0x1450
|
|
|
|
#define MN_vgatherqpd 0x145c
|
|
|
|
#define MN_vscatterqpd 0x1467
|
|
|
|
#define MN_vcmpnge_uqpd 0x1473
|
|
|
|
#define MN_vcmpnle_uqpd 0x1480
|
|
|
|
#define MN_vcmptrue_uqpd 0x148d
|
|
|
|
#define MN_vcmpneq_uqpd 0x149b
|
|
|
|
#define MN_vcmpeq_uqpd 0x14a8
|
|
|
|
#define MN_vcmpngt_uqpd 0x14b4
|
|
|
|
#define MN_vcmpnlt_uqpd 0x14c1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_orpd (MN_vorpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vorpd 0x14ce
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_xorpd (MN_vxorpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vxorpd 0x14d4
|
|
|
|
#define MN_vcmpunord_spd 0x14db
|
|
|
|
#define MN_vcmpord_spd 0x14e9
|
|
|
|
#define MN_vcmpge_ospd 0x14f5
|
|
|
|
#define MN_vcmple_ospd 0x1501
|
|
|
|
#define MN_vcmpfalse_ospd 0x150d
|
|
|
|
#define MN_vcmpneq_ospd 0x151c
|
|
|
|
#define MN_vcmpeq_ospd 0x1529
|
|
|
|
#define MN_vcmpgt_ospd 0x1535
|
|
|
|
#define MN_vcmplt_ospd 0x1541
|
|
|
|
#define MN_vfpclasspd 0x154d
|
|
|
|
#define MN_incsspd 0x1558
|
|
|
|
#define MN_rdsspd 0x1560
|
|
|
|
#define MN_vcompresspd 0x1567
|
|
|
|
#define MN_vcmpnge_uspd 0x1573
|
|
|
|
#define MN_vcmpnle_uspd 0x1580
|
|
|
|
#define MN_vcmptrue_uspd 0x158d
|
|
|
|
#define MN_vcmpneq_uspd 0x159b
|
|
|
|
#define MN_vcmpeq_uspd 0x15a8
|
|
|
|
#define MN_vcmpngt_uspd 0x15b4
|
|
|
|
#define MN_vcmpnlt_uspd 0x15c1
|
|
|
|
#define MN_vcmpngtpd 0x15ce
|
|
|
|
#define MN_vcmpgtpd 0x15d8
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpnltpd (MN_vcmpnltpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpnltpd 0x15e1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpltpd (MN_vcmpltpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpltpd 0x15eb
|
|
|
|
#define MN_vgetmantpd 0x15f4
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movntpd (MN_vmovntpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovntpd 0x15ff
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_sqrtpd (MN_vsqrtpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vsqrtpd 0x1608
|
|
|
|
#define MN_vtestpd 0x1610
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movupd (MN_vmovupd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovupd 0x1618
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_blendvpd (MN_vblendvpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vblendvpd 0x1620
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_divpd (MN_vdivpd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vdivpd 0x162a
|
|
|
|
#define MN_vmaskmovpd 0x1631
|
Support Intel AVX10.2 minmax, vector copy and compare instructions
In this patch, we will support AVX10.2 minmax, vector copy and compare
instructions. This will finish the new instruction form support for
AVX10.2. Most of them are new instructions forms except for vmovd
and vmovw, which are extended usage from the old ones.
gas/ChangeLog:
* NEWS: Mention AVX10.2.
* testsuite/gas/i386/i386.exp: Add AVX10.2 tests.
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/avx10_2-256-5-intel.d: New test.
* testsuite/gas/i386/avx10_2-256-miscs.d: Ditto.
* testsuite/gas/i386/avx10_2-256-miscs.s: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs-intel.d: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs.d: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs.s: Ditto.
opcodes/ChangeLog:
* i386-dis-evex-len.h: Add EVEX_LEN_0F7E_P_1_W_1,
EVEX_LEN_0FD6_P_2_W_0, EVEX_LEN_MAP5_6E and EVEX_LEN_MAP5_7E.
* i386-dis-evex-prefix.h: Add PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F,
PREFIX_EVEX_0F3A52, PREFIX_EVEX_0F3A53, PREFIX_EVEX_MAP5_2E,
PREFIX_EVEX_MAP5_2F, PREFIX_EVEX_MAP5_6E and PREFIX_EVEX_MAP5_7E.
* i386-dis-evex-w.h: Adjust EVEX_W_0F3A42, EVEX_W_0F7E_P_1
and EVEX_W_0FD6. Add EVEX_W_MAP5_6E_P_1 and EVEX_W_MAP5_7E_P_1.
* i386-dis-evex.h: Add and adjust table entries for AVX10.2.
* i386-dis.c (PREFIX_EVEX_0F2E): New.
(PREFIX_EVEX_0F2F): Ditto.
(PREFIX_EVEX_0F3A52): Ditto.
(PREFIX_EVEX_0F3A53): Ditto.
(PREFIX_EVEX_MAP5_2E): Ditto.
(PREFIX_EVEX_MAP5_2F): Ditto.
(PREFIX_EVEX_MAP5_6E_L_0): Ditto.
(PREFIX_EVEX_MAP5_7E_L_0): Ditto.
(EVEX_LEN_0F7E_P_1_W_1): Ditto.
(EVEX_LEN_0FD6_P_2_W_0): Ditto.
(EVEX_LEN_MAP5_6E): Ditto.
(EVEX_LEN_MAP5_7E): Ditto.
(EVEX_W_MAP5_6E_P_1): Ditto.
(EVEX_W_MAP5_7E_P_1): Ditto.
* i386-opc.tbl: Add AVX10.2 instructions.
* i386-mnem.h: Regenerated.
* i386-tbl.h: Ditto.
Co-authored-by: Jun Zhang <jun.zhang@intel.com>
Co-authored-by: Zewei Mo <zewei.mo@intel.com>
2024-12-23 11:32:03 +08:00
|
|
|
#define MN_maxpd (MN_vminmaxpd + 4)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vminmaxpd 0x163c
|
|
|
|
#define MN_vmaxpd 0x1646
|
|
|
|
#define MN_vfrczpd 0x164d
|
|
|
|
#define MN_vpcomeqd 0x1655
|
|
|
|
#define MN_vpcomneqd 0x165e
|
|
|
|
#define MN_vpcmpneqd 0x1668
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pcmpeqd (MN_vpcmpeqd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpcmpeqd 0x1672
|
|
|
|
#define MN_vpgatherqd 0x167b
|
|
|
|
#define MN_vpscatterqd 0x1686
|
|
|
|
#define MN_vpmovusqd 0x1692
|
|
|
|
#define MN_vpmovsqd 0x169c
|
|
|
|
#define MN_vpmovqd 0x16a5
|
|
|
|
#define MN_shrd 0x16ad
|
|
|
|
#define MN_kord 0x16b2
|
|
|
|
#define MN_kxnord 0x16b7
|
|
|
|
#define MN_vpord 0x16be
|
|
|
|
#define MN_vprord 0x16c4
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_word (MN_aword + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_aword 0x16cb
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_dword (MN_adword + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_adword 0x16d1
|
|
|
|
#define MN_kxord 0x16d8
|
|
|
|
#define MN_vpxord 0x16de
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pinsrd (MN_vpinsrd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpinsrd 0x16e5
|
|
|
|
#define MN_kshiftrd 0x16ed
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pextrd (MN_vpextrd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpextrd 0x16f6
|
|
|
|
#define MN_vfmsub231sd 0x16fe
|
|
|
|
#define MN_vfnmsub231sd 0x170a
|
|
|
|
#define MN_vfmadd231sd 0x1717
|
|
|
|
#define MN_vfnmadd231sd 0x1723
|
|
|
|
#define MN_vfmsub132sd 0x1730
|
|
|
|
#define MN_vfnmsub132sd 0x173c
|
|
|
|
#define MN_vfmadd132sd 0x1749
|
|
|
|
#define MN_vfnmadd132sd 0x1755
|
|
|
|
#define MN_vcvtsh2sd 0x1762
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvtsi2sd (MN_vcvtsi2sd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvtsi2sd 0x176c
|
|
|
|
#define MN_vcvtusi2sd 0x1776
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvtss2sd (MN_vcvtss2sd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvtss2sd 0x1781
|
|
|
|
#define MN_vfmsub213sd 0x178b
|
|
|
|
#define MN_vfnmsub213sd 0x1797
|
|
|
|
#define MN_vfmadd213sd 0x17a4
|
|
|
|
#define MN_vfnmadd213sd 0x17b0
|
|
|
|
#define MN_vrcp14sd 0x17bd
|
|
|
|
#define MN_vrsqrt14sd 0x17c6
|
|
|
|
#define MN_vrcp28sd 0x17d1
|
|
|
|
#define MN_vrsqrt28sd 0x17da
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pabsd (MN_vpabsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpabsd 0x17e5
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_subsd (MN_vfmsubsd + 3)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vfmsubsd 0x17ec
|
|
|
|
#define MN_vfnmsubsd 0x17f5
|
|
|
|
#define MN_vsubsd 0x17ff
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_addsd (MN_vfmaddsd + 3)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vfmaddsd 0x1806
|
|
|
|
#define MN_vfnmaddsd 0x180f
|
|
|
|
#define MN_vaddsd 0x1819
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_roundsd (MN_vroundsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vroundsd 0x1820
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpunordsd (MN_vcmpunordsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpunordsd 0x1829
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpordsd (MN_vcmpordsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpordsd 0x1835
|
|
|
|
#define MN_vreducesd 0x183f
|
|
|
|
#define MN_vrangesd 0x1849
|
|
|
|
#define MN_vcmpngesd 0x1852
|
|
|
|
#define MN_vcmpgesd 0x185c
|
|
|
|
#define MN_vrndscalesd 0x1865
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpnlesd (MN_vcmpnlesd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpnlesd 0x1871
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmplesd (MN_vcmplesd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmplesd 0x187b
|
|
|
|
#define MN_vcmpfalsesd 0x1884
|
|
|
|
#define MN_vcmptruesd 0x1890
|
|
|
|
#define MN_vscalefsd 0x189b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_comisd (MN_ucomisd + 1)
|
|
|
|
#define MN_ucomisd (MN_vucomisd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vucomisd 0x18a5
|
|
|
|
#define MN_vcomisd 0x18ae
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_mulsd (MN_vmulsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmulsd 0x18b6
|
|
|
|
#define MN_vfixupimmsd 0x18bd
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_minsd (MN_pminsd + 1)
|
|
|
|
#define MN_pminsd (MN_vpminsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpminsd 0x18c9
|
|
|
|
#define MN_vminsd 0x18d1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpsd (MN_vcmpsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpsd 0x18d8
|
|
|
|
#define MN_vgetexpsd 0x18df
|
|
|
|
#define MN_vcmpunord_qsd 0x18e9
|
|
|
|
#define MN_vcmpord_qsd 0x18f7
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpneqsd (MN_vcmpneqsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpneqsd 0x1903
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpeqsd (MN_vcmpeqsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vcmpeqsd 0x190d
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#define MN_vcmpge_oqsd 0x1916
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#define MN_vcmple_oqsd 0x1922
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#define MN_vcmpfalse_oqsd 0x192e
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#define MN_vcmpneq_oqsd 0x193d
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#define MN_vcmpeq_oqsd 0x194a
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#define MN_vcmpgt_oqsd 0x1956
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#define MN_vcmplt_oqsd 0x1962
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#define MN_vcmpnge_uqsd 0x196e
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#define MN_vcmpnle_uqsd 0x197b
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#define MN_vcmptrue_uqsd 0x1988
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#define MN_vcmpneq_uqsd 0x1996
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#define MN_vcmpeq_uqsd 0x19a3
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#define MN_vcmpngt_uqsd 0x19af
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#define MN_vcmpnlt_uqsd 0x19bc
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#define MN_vcmpunord_ssd 0x19c9
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#define MN_vcmpord_ssd 0x19d7
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#define MN_vpdpbssd 0x19e3
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#define MN_tdpbssd 0x19ec
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#define MN_vpcompressd 0x19f4
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#define MN_vcmpge_ossd 0x1a00
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#define MN_vcmple_ossd 0x1a0c
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#define MN_vcmpfalse_ossd 0x1a18
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#define MN_vcmpneq_ossd 0x1a27
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#define MN_vcmpeq_ossd 0x1a34
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#define MN_vcmpgt_ossd 0x1a40
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#define MN_vcmplt_ossd 0x1a4c
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#define MN_wrssd 0x1a58
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#define MN_vfpclasssd 0x1a5e
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#define MN_vcmpnge_ussd 0x1a69
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#define MN_vcmpnle_ussd 0x1a76
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#define MN_vcmptrue_ussd 0x1a83
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#define MN_vcmpneq_ussd 0x1a91
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#define MN_vcmpeq_ussd 0x1a9e
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#define MN_vcmpngt_ussd 0x1aaa
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#define MN_vcmpnlt_ussd 0x1ab7
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#define MN_wrussd 0x1ac4
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#define MN_vp4dpwssd 0x1acb
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#define MN_vpdpwssd 0x1ad5
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#define MN_vcmpngtsd 0x1ade
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#define MN_vcmpgtsd 0x1ae8
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2023-01-20 10:16:17 +01:00
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#define MN_cmpnltsd (MN_vcmpnltsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vcmpnltsd 0x1af1
|
2023-01-20 10:16:17 +01:00
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|
|
#define MN_cmpltsd (MN_vcmpltsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vcmpltsd 0x1afb
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|
|
|
#define MN_vgetmantsd 0x1b04
|
|
|
|
#define MN_movntsd 0x1b0f
|
2023-01-20 10:16:17 +01:00
|
|
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#define MN_sqrtsd (MN_vsqrtsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vsqrtsd 0x1b17
|
|
|
|
#define MN_vbroadcastsd 0x1b1f
|
|
|
|
#define MN_vpdpbusd 0x1b2c
|
|
|
|
#define MN_tdpbusd 0x1b35
|
|
|
|
#define MN_vpdpwusd 0x1b3d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_divsd (MN_vdivsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
|
#define MN_vdivsd 0x1b46
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movsd (MN_vmovsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovsd 0x1b4d
|
Support Intel AVX10.2 minmax, vector copy and compare instructions
In this patch, we will support AVX10.2 minmax, vector copy and compare
instructions. This will finish the new instruction form support for
AVX10.2. Most of them are new instructions forms except for vmovd
and vmovw, which are extended usage from the old ones.
gas/ChangeLog:
* NEWS: Mention AVX10.2.
* testsuite/gas/i386/i386.exp: Add AVX10.2 tests.
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/avx10_2-256-5-intel.d: New test.
* testsuite/gas/i386/avx10_2-256-miscs.d: Ditto.
* testsuite/gas/i386/avx10_2-256-miscs.s: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs-intel.d: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs.d: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs.s: Ditto.
opcodes/ChangeLog:
* i386-dis-evex-len.h: Add EVEX_LEN_0F7E_P_1_W_1,
EVEX_LEN_0FD6_P_2_W_0, EVEX_LEN_MAP5_6E and EVEX_LEN_MAP5_7E.
* i386-dis-evex-prefix.h: Add PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F,
PREFIX_EVEX_0F3A52, PREFIX_EVEX_0F3A53, PREFIX_EVEX_MAP5_2E,
PREFIX_EVEX_MAP5_2F, PREFIX_EVEX_MAP5_6E and PREFIX_EVEX_MAP5_7E.
* i386-dis-evex-w.h: Adjust EVEX_W_0F3A42, EVEX_W_0F7E_P_1
and EVEX_W_0FD6. Add EVEX_W_MAP5_6E_P_1 and EVEX_W_MAP5_7E_P_1.
* i386-dis-evex.h: Add and adjust table entries for AVX10.2.
* i386-dis.c (PREFIX_EVEX_0F2E): New.
(PREFIX_EVEX_0F2F): Ditto.
(PREFIX_EVEX_0F3A52): Ditto.
(PREFIX_EVEX_0F3A53): Ditto.
(PREFIX_EVEX_MAP5_2E): Ditto.
(PREFIX_EVEX_MAP5_2F): Ditto.
(PREFIX_EVEX_MAP5_6E_L_0): Ditto.
(PREFIX_EVEX_MAP5_7E_L_0): Ditto.
(EVEX_LEN_0F7E_P_1_W_1): Ditto.
(EVEX_LEN_0FD6_P_2_W_0): Ditto.
(EVEX_LEN_MAP5_6E): Ditto.
(EVEX_LEN_MAP5_7E): Ditto.
(EVEX_W_MAP5_6E_P_1): Ditto.
(EVEX_W_MAP5_7E_P_1): Ditto.
* i386-opc.tbl: Add AVX10.2 instructions.
* i386-mnem.h: Regenerated.
* i386-tbl.h: Ditto.
Co-authored-by: Jun Zhang <jun.zhang@intel.com>
Co-authored-by: Zewei Mo <zewei.mo@intel.com>
2024-12-23 11:32:03 +08:00
|
|
|
#define MN_maxsd (MN_vminmaxsd + 4)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vminmaxsd 0x1b54
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmaxsd (MN_vpmaxsd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmaxsd 0x1b5e
|
|
|
|
#define MN_vmaxsd 0x1b66
|
|
|
|
#define MN_vucomxsd 0x1b6d
|
|
|
|
#define MN_vcomxsd 0x1b76
|
|
|
|
#define MN_vfrczsd 0x1b7e
|
|
|
|
#define MN_vp2intersectd 0x1b86
|
|
|
|
#define MN_vpconflictd 0x1b94
|
|
|
|
#define MN_vpcomgtd 0x1ba0
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pcmpgtd (MN_vpcmpgtd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpcmpgtd 0x1ba9
|
|
|
|
#define MN_cltd 0x1bb2
|
|
|
|
#define MN_vpcomltd 0x1bb7
|
|
|
|
#define MN_vpcmpnltd 0x1bc0
|
|
|
|
#define MN_vpcmpltd 0x1bca
|
|
|
|
#define MN_vpopcntd 0x1bd3
|
|
|
|
#define MN_vplzcntd 0x1bdc
|
|
|
|
#define MN_knotd 0x1be5
|
|
|
|
#define MN_vprotd 0x1beb
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_std (MN_vpbroadcastd + 9)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vpbroadcastd 0x1bf2
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#define MN_ktestd 0x1bff
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#define MN_kortestd 0x1c06
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#define MN_cwtd 0x1c0f
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#define MN_vpcomgeud 0x1c14
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#define MN_vpcomleud 0x1c1e
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#define MN_vpcmpnleud 0x1c28
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#define MN_vpcmpleud 0x1c33
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#define MN_vpcomfalseud 0x1c3d
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#define MN_vpcomtrueud 0x1c4a
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#define MN_vpcomud 0x1c56
|
2023-01-20 10:16:17 +01:00
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#define MN_pminud (MN_vpminud + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vpminud 0x1c5e
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#define MN_vpcmpud 0x1c66
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#define MN_vpcomequd 0x1c6e
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#define MN_vpcomnequd 0x1c78
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#define MN_vpcmpnequd 0x1c83
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#define MN_vpcmpequd 0x1c8e
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#define MN_vpdpbsud 0x1c98
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#define MN_tdpbsud 0x1ca1
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#define MN_vpdpwsud 0x1ca9
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#define MN_vpcomgtud 0x1cb2
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#define MN_vpcomltud 0x1cbc
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#define MN_vpcmpnltud 0x1cc6
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#define MN_vpcmpltud 0x1cd1
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#define MN_vpdpbuud 0x1cdb
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#define MN_tdpbuud 0x1ce4
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#define MN_vpdpwuud 0x1cec
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmaxud (MN_vpmaxud + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
#define MN_vpmaxud 0x1cf5
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|
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|
#define MN_vpsravd 0x1cfd
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|
#define MN_vpshldvd 0x1d05
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|
#define MN_vpshrdvd 0x1d0e
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#define MN_vpsllvd 0x1d17
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#define MN_vprolvd 0x1d1f
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|
|
#define MN_vpsrlvd 0x1d27
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_invd (MN_wbinvd + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
#define MN_wbinvd 0x1d2f
|
|
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|
#define MN_wbnoinvd 0x1d36
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movd (MN_kmovd + 1)
|
|
|
|
#define MN_kmovd (MN_vpmaskmovd + 5)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmaskmovd 0x1d3f
|
|
|
|
#define MN_vmovd 0x1d4a
|
|
|
|
#define MN_vprorvd 0x1d50
|
|
|
|
#define MN_vphsubwd 0x1d58
|
|
|
|
#define MN_cwd 0x1d61
|
|
|
|
#define MN_vphaddwd 0x1d65
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmaddwd (MN_vpmaddwd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmaddwd 0x1d6e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_punpckhwd (MN_vpunpckhwd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpunpckhwd 0x1d77
|
|
|
|
#define MN_kunpckwd 0x1d82
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_punpcklwd (MN_vpunpcklwd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpunpcklwd 0x1d8b
|
|
|
|
#define MN_vpmacswd 0x1d96
|
|
|
|
#define MN_vpmadcswd 0x1d9f
|
|
|
|
#define MN_vpmacsswd 0x1da9
|
|
|
|
#define MN_vpmadcsswd 0x1db3
|
|
|
|
#define MN_vphadduwd 0x1dbe
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmovsxwd (MN_vpmovsxwd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmovsxwd 0x1dc8
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmovzxwd (MN_vpmovzxwd + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vpmovzxwd 0x1dd2
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#define MN_movsxd 0x1ddc
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#define MN_fldl2e 0x1de3
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#define MN_jae 0x1dea
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#define MN_jnae 0x1dee
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#define MN_ccmpnae 0x1df3
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#define MN_setnae 0x1dfb
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#define MN_ctestnae 0x1e02
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#define MN_setzunae 0x1e0b
|
2023-01-20 10:16:17 +01:00
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#define MN_cmovnae (MN_fcmovnae + 1)
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_fcmovnae (MN_cfcmovnae + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
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#define MN_cfcmovnae 0x1e14
|
|
|
|
#define MN_ccmpae 0x1e1e
|
|
|
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#define MN_setae 0x1e25
|
|
|
|
#define MN_ctestae 0x1e2b
|
|
|
|
#define MN_setzuae 0x1e33
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmovae (MN_fcmovae + 1)
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_fcmovae (MN_cfcmovae + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
#define MN_cfcmovae 0x1e3b
|
|
|
|
#define MN_jbe 0x1e44
|
|
|
|
#define MN_jnbe 0x1e48
|
|
|
|
#define MN_ccmpnbe 0x1e4d
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#define MN_setnbe 0x1e55
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|
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#define MN_ctestnbe 0x1e5c
|
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|
#define MN_setzunbe 0x1e65
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmovnbe (MN_fcmovnbe + 1)
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_fcmovnbe (MN_cfcmovnbe + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovnbe 0x1e6e
|
|
|
|
#define MN_ccmpbe 0x1e78
|
|
|
|
#define MN_setbe 0x1e7f
|
|
|
|
#define MN_ctestbe 0x1e85
|
|
|
|
#define MN_setzube 0x1e8d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movbe (MN_cmovbe + 1)
|
|
|
|
#define MN_cmovbe (MN_fcmovbe + 1)
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_fcmovbe (MN_cfcmovbe + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovbe 0x1e95
|
|
|
|
#define MN_lfence 0x1e9e
|
|
|
|
#define MN_mfence 0x1ea5
|
|
|
|
#define MN_sfence 0x1eac
|
|
|
|
#define MN_cwde 0x1eb3
|
|
|
|
#define MN_ffree 0x1eb8
|
|
|
|
#define MN_jge 0x1ebe
|
|
|
|
#define MN_jnge 0x1ec2
|
|
|
|
#define MN_ccmpnge 0x1ec7
|
|
|
|
#define MN_setnge 0x1ecf
|
|
|
|
#define MN_ctestnge 0x1ed6
|
|
|
|
#define MN_setzunge 0x1edf
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovnge (MN_cfcmovnge + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovnge 0x1ee8
|
|
|
|
#define MN_ccmpge 0x1ef2
|
|
|
|
#define MN_pfcmpge 0x1ef9
|
|
|
|
#define MN_setge 0x1f01
|
|
|
|
#define MN_ctestge 0x1f07
|
|
|
|
#define MN_setzuge 0x1f0f
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovge (MN_cfcmovge + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovge 0x1f17
|
|
|
|
#define MN_je 0x1f20
|
|
|
|
#define MN_fscale 0x1f23
|
|
|
|
#define MN_jle 0x1f2a
|
|
|
|
#define MN_jnle 0x1f2e
|
|
|
|
#define MN_ccmpnle 0x1f33
|
|
|
|
#define MN_setnle 0x1f3b
|
|
|
|
#define MN_ctestnle 0x1f42
|
|
|
|
#define MN_setzunle 0x1f4b
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovnle (MN_cfcmovnle + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovnle 0x1f54
|
|
|
|
#define MN_ccmple 0x1f5e
|
|
|
|
#define MN_setle 0x1f65
|
|
|
|
#define MN_ctestle 0x1f6b
|
|
|
|
#define MN_setzule 0x1f73
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovle (MN_cfcmovle + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovle 0x1f7b
|
|
|
|
#define MN_vmresume 0x1f84
|
|
|
|
#define MN_jne 0x1f8d
|
|
|
|
#define MN_repne 0x1f91
|
|
|
|
#define MN_ccmpne 0x1f97
|
|
|
|
#define MN_loopne 0x1f9e
|
|
|
|
#define MN_setne 0x1fa5
|
|
|
|
#define MN_ctestne 0x1fab
|
|
|
|
#define MN_setzune 0x1fb3
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmovne (MN_fcmovne + 1)
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_fcmovne (MN_cfcmovne + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovne 0x1fbb
|
|
|
|
#define MN_repe 0x1fc4
|
|
|
|
#define MN_jpe 0x1fc9
|
|
|
|
#define MN_ccmpe 0x1fcd
|
|
|
|
#define MN_loope 0x1fd3
|
|
|
|
#define MN_setpe 0x1fd9
|
|
|
|
#define MN_setzupe 0x1fdf
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovpe (MN_cfcmovpe + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovpe 0x1fe7
|
|
|
|
#define MN_cdqe 0x1ff0
|
|
|
|
#define MN_xacquire 0x1ff5
|
|
|
|
#define MN_xstore 0x1ffe
|
|
|
|
#define MN_rdfsbase 0x2005
|
|
|
|
#define MN_wrfsbase 0x200e
|
|
|
|
#define MN_rdgsbase 0x2017
|
|
|
|
#define MN_wrgsbase 0x2020
|
|
|
|
#define MN_tilerelease 0x2029
|
|
|
|
#define MN_xrelease 0x2035
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pause (MN_tpause + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_tpause 0x203e
|
|
|
|
#define MN_pvalidate 0x2045
|
|
|
|
#define MN_rmpupdate 0x204f
|
|
|
|
#define MN_sete 0x2059
|
|
|
|
#define MN_vmwrite 0x205e
|
|
|
|
#define MN_ptwrite 0x2066
|
|
|
|
#define MN_cldemote 0x206e
|
|
|
|
#define MN_cteste 0x2077
|
|
|
|
#define MN_sha1nexte 0x207e
|
|
|
|
#define MN_setzue 0x2088
|
|
|
|
#define MN_leave 0x208f
|
|
|
|
#define MN_fsave 0x2095
|
|
|
|
#define MN_vmsave 0x209b
|
|
|
|
#define MN_fnsave 0x20a2
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_xsave (MN_fxsave + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_fxsave 0x20a9
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmove (MN_fcmove + 1)
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_fcmove (MN_cfcmove + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmove 0x20b0
|
|
|
|
#define MN_serialize 0x20b8
|
|
|
|
#define MN_vmxoff 0x20c2
|
|
|
|
#define MN_lahf 0x20c9
|
|
|
|
#define MN_sahf 0x20ce
|
|
|
|
#define MN_pushf 0x20d3
|
|
|
|
#define MN_ccmpf 0x20d9
|
|
|
|
#define MN_popf 0x20df
|
|
|
|
#define MN_bsf 0x20e4
|
|
|
|
#define MN_retf 0x20e8
|
|
|
|
#define MN_ctestf 0x20ed
|
|
|
|
#define MN_neg 0x20f4
|
|
|
|
#define MN_ldtilecfg 0x20f8
|
|
|
|
#define MN_sttilecfg 0x2102
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_xchg (MN_cmpxchg + 3)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
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|
#define MN_cmpxchg 0x210c
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#define MN_pconfig 0x2114
|
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#define MN_jg 0x211c
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#define MN_jng 0x211f
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#define MN_ccmpng 0x2123
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#define MN_xstore_rng 0x212a
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#define MN_xstorerng 0x2135
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#define MN_setng 0x213f
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#define MN_ctestng 0x2145
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#define MN_setzung 0x214d
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovng (MN_cfcmovng + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovng 0x2155
|
|
|
|
#define MN_invlpg 0x215e
|
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|
#define MN_ccmpg 0x2165
|
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|
#define MN_setg 0x216b
|
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|
|
#define MN_ctestg 0x2170
|
|
|
|
#define MN_setzug 0x2177
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovg (MN_cfcmovg + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_cfcmovg 0x217e
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#define MN_vmlaunch 0x2186
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#define MN_prefetch 0x218f
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#define MN_fxch 0x2198
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#define MN_vfmaddsub231ph 0x219d
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#define MN_vfmsub231ph 0x21ac
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#define MN_vfnmsub231ph 0x21b8
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#define MN_vfmsubadd231ph 0x21c5
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#define MN_vfmadd231ph 0x21d4
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#define MN_vfnmadd231ph 0x21e0
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#define MN_vfmaddsub132ph 0x21ed
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#define MN_vfmsub132ph 0x21fc
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#define MN_vfnmsub132ph 0x2208
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#define MN_vfmsubadd132ph 0x2215
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#define MN_vfmadd132ph 0x2224
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#define MN_vfnmadd132ph 0x2230
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#define MN_vcvthf82ph 0x223d
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#define MN_vcvtpd2ph 0x2248
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#define MN_vcvtdq2ph 0x2252
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#define MN_vcvtudq2ph 0x225c
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#define MN_vcvtqq2ph 0x2267
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#define MN_vcvtuqq2ph 0x2271
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#define MN_vcvtps2ph 0x227c
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#define MN_vcvtw2ph 0x2286
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#define MN_vcvtuw2ph 0x228f
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#define MN_vfmaddsub213ph 0x2299
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#define MN_vfmsub213ph 0x22a8
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#define MN_vfnmsub213ph 0x22b4
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#define MN_vfmsubadd213ph 0x22c1
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#define MN_vfmadd213ph 0x22d0
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#define MN_vfnmadd213ph 0x22dc
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#define MN_vsubph 0x22e9
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#define MN_vfcmaddcph 0x22f0
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#define MN_vfmaddcph 0x22fb
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#define MN_vfcmulcph 0x2305
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#define MN_vfmulcph 0x230f
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#define MN_vaddph 0x2318
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#define MN_vcmpunordph 0x231f
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#define MN_vcmpordph 0x232b
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#define MN_vreduceph 0x2335
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#define MN_vcmpngeph 0x233f
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#define MN_vcmpgeph 0x2349
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#define MN_vrndscaleph 0x2352
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#define MN_vcmpnleph 0x235e
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#define MN_vcmpleph 0x2368
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#define MN_vcmpfalseph 0x2371
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#define MN_vcmptrueph 0x237d
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#define MN_vscalefph 0x2388
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#define MN_vmulph 0x2392
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#define MN_vminph 0x2399
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#define MN_vrcpph 0x23a0
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#define MN_vcmpph 0x23a7
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#define MN_vgetexpph 0x23ae
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#define MN_vcmpunord_qph 0x23b8
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#define MN_vcmpord_qph 0x23c6
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#define MN_vcmpneqph 0x23d2
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#define MN_vcmpeqph 0x23dc
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#define MN_vcmpge_oqph 0x23e5
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#define MN_vcmple_oqph 0x23f1
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#define MN_vcmpfalse_oqph 0x23fd
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#define MN_vcmpneq_oqph 0x240c
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#define MN_vcmpeq_oqph 0x2419
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#define MN_vcmpgt_oqph 0x2425
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#define MN_vcmplt_oqph 0x2431
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#define MN_vcmpnge_uqph 0x243d
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#define MN_vcmpnle_uqph 0x244a
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#define MN_vcmptrue_uqph 0x2457
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#define MN_vcmpneq_uqph 0x2465
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#define MN_vcmpeq_uqph 0x2472
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#define MN_vcmpngt_uqph 0x247e
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#define MN_vcmpnlt_uqph 0x248b
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#define MN_vcmpunord_sph 0x2498
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#define MN_vcmpord_sph 0x24a6
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#define MN_vcmpge_osph 0x24b2
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#define MN_vcmple_osph 0x24be
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#define MN_vcmpfalse_osph 0x24ca
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#define MN_vcmpneq_osph 0x24d9
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#define MN_vcmpeq_osph 0x24e6
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#define MN_vcmpgt_osph 0x24f2
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#define MN_vcmplt_osph 0x24fe
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#define MN_vfpclassph 0x250a
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#define MN_vcmpnge_usph 0x2515
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#define MN_vcmpnle_usph 0x2522
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#define MN_vcmptrue_usph 0x252f
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#define MN_vcmpneq_usph 0x253d
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#define MN_vcmpeq_usph 0x254a
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#define MN_vcmpngt_usph 0x2556
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#define MN_vcmpnlt_usph 0x2563
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#define MN_vcmpngtph 0x2570
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#define MN_vcmpgtph 0x257a
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#define MN_vcmpnltph 0x2583
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#define MN_vcmpltph 0x258d
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#define MN_vgetmantph 0x2596
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#define MN_vrsqrtph 0x25a1
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#define MN_vsqrtph 0x25aa
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#define MN_vdivph 0x25b2
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#define MN_vminmaxph 0x25b9
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#define MN_vmaxph 0x25c3
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#define MN_vpmacsdqh 0x25ca
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#define MN_vpmacssdqh 0x25d4
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#define MN_vfmsub231sh 0x25df
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#define MN_vfnmsub231sh 0x25eb
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#define MN_vfmadd231sh 0x25f8
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#define MN_vfnmadd231sh 0x2604
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#define MN_vfmsub132sh 0x2611
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#define MN_vfnmsub132sh 0x261d
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#define MN_vfmadd132sh 0x262a
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#define MN_vfnmadd132sh 0x2636
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#define MN_vcvtsd2sh 0x2643
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#define MN_vcvtsi2sh 0x264d
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#define MN_vcvtusi2sh 0x2657
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#define MN_vcvtss2sh 0x2662
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#define MN_vfmsub213sh 0x266c
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#define MN_vfnmsub213sh 0x2678
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#define MN_vfmadd213sh 0x2685
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#define MN_vfnmadd213sh 0x2691
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#define MN_psmash 0x269e
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#define MN_vsubsh 0x26a5
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#define MN_vfcmaddcsh 0x26ac
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#define MN_vfmaddcsh 0x26b7
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#define MN_vfcmulcsh 0x26c1
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#define MN_vfmulcsh 0x26cb
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#define MN_vaddsh 0x26d4
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#define MN_vcmpunordsh 0x26db
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#define MN_vcmpordsh 0x26e7
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#define MN_vreducesh 0x26f1
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#define MN_vcmpngesh 0x26fb
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#define MN_vcmpgesh 0x2705
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#define MN_vrndscalesh 0x270e
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#define MN_vcmpnlesh 0x271a
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#define MN_vcmplesh 0x2724
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#define MN_vcmpfalsesh 0x272d
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#define MN_vcmptruesh 0x2739
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#define MN_vscalefsh 0x2744
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#define MN_vucomish 0x274e
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#define MN_vcomish 0x2757
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#define MN_vmulsh 0x275f
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#define MN_vminsh 0x2766
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#define MN_vrcpsh 0x276d
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#define MN_vcmpsh 0x2774
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#define MN_vgetexpsh 0x277b
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#define MN_vcmpunord_qsh 0x2785
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#define MN_vcmpord_qsh 0x2793
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#define MN_vcmpneqsh 0x279f
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#define MN_vcmpeqsh 0x27a9
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#define MN_vcmpge_oqsh 0x27b2
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#define MN_vcmple_oqsh 0x27be
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#define MN_vcmpfalse_oqsh 0x27ca
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#define MN_vcmpneq_oqsh 0x27d9
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#define MN_vcmpeq_oqsh 0x27e6
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#define MN_vcmpgt_oqsh 0x27f2
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#define MN_vcmplt_oqsh 0x27fe
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#define MN_vcmpnge_uqsh 0x280a
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#define MN_vcmpnle_uqsh 0x2817
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#define MN_vcmptrue_uqsh 0x2824
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#define MN_vcmpneq_uqsh 0x2832
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#define MN_vcmpeq_uqsh 0x283f
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#define MN_vcmpngt_uqsh 0x284b
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#define MN_vcmpnlt_uqsh 0x2858
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#define MN_vcmpunord_ssh 0x2865
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#define MN_vcmpord_ssh 0x2873
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#define MN_vcmpge_ossh 0x287f
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#define MN_vcmple_ossh 0x288b
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#define MN_vcmpfalse_ossh 0x2897
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#define MN_vcmpneq_ossh 0x28a6
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#define MN_vcmpeq_ossh 0x28b3
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#define MN_vcmpgt_ossh 0x28bf
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#define MN_vcmplt_ossh 0x28cb
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#define MN_vfpclasssh 0x28d7
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#define MN_vcmpnge_ussh 0x28e2
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#define MN_vcmpnle_ussh 0x28ef
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#define MN_vcmptrue_ussh 0x28fc
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#define MN_vcmpneq_ussh 0x290a
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#define MN_vcmpeq_ussh 0x2917
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#define MN_vcmpngt_ussh 0x2923
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#define MN_vcmpnlt_ussh 0x2930
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#define MN_vcmpngtsh 0x293d
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#define MN_vcmpgtsh 0x2947
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#define MN_vcmpnltsh 0x2950
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#define MN_vcmpltsh 0x295a
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#define MN_vgetmantsh 0x2963
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#define MN_vrsqrtsh 0x296e
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#define MN_vsqrtsh 0x2977
|
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#define MN_clflush 0x297f
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#define MN_push 0x2987
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#define MN_vdivsh 0x298c
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#define MN_vmovsh 0x2993
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#define MN_vminmaxsh 0x299a
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#define MN_vmaxsh 0x29a4
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#define MN_vucomxsh 0x29ab
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#define MN_vcomxsh 0x29b4
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#define MN_blci 0x29bc
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#define MN_clgi 0x29c1
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#define MN_stgi 0x29c6
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#define MN_bzhi 0x29cb
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#define MN_cli 0x29d0
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#define MN_fcomi 0x29d4
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#define MN_fucomi 0x29da
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#define MN_feni 0x29e1
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#define MN_fneni 0x29e6
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#define MN_cvttpd2pi 0x29ec
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#define MN_cvtpd2pi 0x29f6
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#define MN_cvttps2pi 0x29ff
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#define MN_cvtps2pi 0x2a09
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#define MN_fldpi 0x2a12
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#define MN_senduipi 0x2a18
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#define MN_fcompi 0x2a21
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#define MN_fucompi 0x2a28
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#define MN_movdiri 0x2a30
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2023-01-20 10:16:17 +01:00
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#define MN_pcmpestri (MN_vpcmpestri + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpcmpestri 0x2a38
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pcmpistri (MN_vpcmpistri + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpcmpistri 0x2a43
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvttsd2si (MN_vcvttsd2si + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvttsd2si 0x2a4e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvtsd2si (MN_vcvtsd2si + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvtsd2si 0x2a59
|
|
|
|
#define MN_vcvttsh2si 0x2a63
|
|
|
|
#define MN_vcvtsh2si 0x2a6e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvttss2si (MN_vcvttss2si + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvttss2si 0x2a78
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvtss2si (MN_vcvtss2si + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvtss2si 0x2a83
|
|
|
|
#define MN_fdisi 0x2a8d
|
|
|
|
#define MN_fndisi 0x2a93
|
|
|
|
#define MN_blsi 0x2a9a
|
|
|
|
#define MN_vcvttsd2usi 0x2a9f
|
|
|
|
#define MN_vcvtsd2usi 0x2aab
|
|
|
|
#define MN_vcvttsh2usi 0x2ab6
|
|
|
|
#define MN_vcvtsh2usi 0x2ac2
|
|
|
|
#define MN_vcvttss2usi 0x2acd
|
|
|
|
#define MN_vcvtss2usi 0x2ad9
|
|
|
|
#define MN_movnti 0x2ae4
|
|
|
|
#define MN_sti 0x2aeb
|
|
|
|
#define MN_clui 0x2aef
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_stui (MN_testui + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_testui 0x2af4
|
|
|
|
#define MN_notrack 0x2afb
|
|
|
|
#define MN_lock 0x2b03
|
|
|
|
#define MN_bndmk 0x2b08
|
|
|
|
#define MN_xresldtrk 0x2b0e
|
|
|
|
#define MN_xsusldtrk 0x2b18
|
|
|
|
#define MN_blcmsk 0x2b22
|
|
|
|
#define MN_blsmsk 0x2b29
|
|
|
|
#define MN_tzmsk 0x2b30
|
|
|
|
#define MN_sal 0x2b36
|
|
|
|
#define MN_lwpval 0x2b3a
|
|
|
|
#define MN_bndcl 0x2b41
|
|
|
|
#define MN_rcl 0x2b47
|
|
|
|
#define MN_shl 0x2b4b
|
|
|
|
#define MN_jl 0x2b4f
|
|
|
|
#define MN_aesdec256kl 0x2b52
|
|
|
|
#define MN_aesenc256kl 0x2b5e
|
|
|
|
#define MN_aesdecwide256kl 0x2b6a
|
|
|
|
#define MN_aesencwide256kl 0x2b7a
|
|
|
|
#define MN_aesdec128kl 0x2b8a
|
|
|
|
#define MN_aesenc128kl 0x2b96
|
|
|
|
#define MN_aesdecwide128kl 0x2ba2
|
|
|
|
#define MN_aesencwide128kl 0x2bb2
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_call (MN_tdcall + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_tdcall 0x2bc2
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#define MN_lcall 0x2bc9
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#define MN_seamcall 0x2bcf
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#define MN_vmmcall 0x2bd8
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#define MN_vmcall 0x2be0
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#define MN_syscall 0x2be7
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#define MN_vzeroall 0x2bef
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#define MN_fildll 0x2bf8
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#define MN_blcfill 0x2bff
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#define MN_blsfill 0x2c07
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#define MN_fistpll 0x2c0f
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#define MN_fisttpll 0x2c17
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#define MN_jnl 0x2c20
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#define MN_ccmpnl 0x2c24
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#define MN_setnl 0x2c2b
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#define MN_ctestnl 0x2c31
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#define MN_setzunl 0x2c39
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2024-07-04 15:49:16 +08:00
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#define MN_cmovnl (MN_cfcmovnl + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_cfcmovnl 0x2c41
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#define MN_rol 0x2c4a
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#define MN_ccmpl 0x2c4e
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#define MN_arpl 0x2c54
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#define MN_vpmacsdql 0x2c59
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#define MN_vpmacssdql 0x2c63
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#define MN_lsl 0x2c6e
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#define MN_movsl 0x2c72
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#define MN_setl 0x2c78
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#define MN_ctestl 0x2c7d
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#define MN_cwtl 0x2c84
|
2023-01-20 10:16:17 +01:00
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#define MN_mul (MN_fmul + 1)
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|
|
#define MN_fmul (MN_pfmul + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
#define MN_pfmul 0x2c89
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_imul (MN_fimul + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_fimul 0x2c8f
|
|
|
|
#define MN_montmul 0x2c95
|
|
|
|
#define MN_setzul 0x2c9d
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovl (MN_cfcmovl + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovl 0x2ca4
|
|
|
|
#define MN_vpmovb2m 0x2cac
|
|
|
|
#define MN_vpmovd2m 0x2cb5
|
|
|
|
#define MN_vpmovq2m 0x2cbe
|
|
|
|
#define MN_vpmovw2m 0x2cc7
|
|
|
|
#define MN_aam 0x2cd0
|
|
|
|
#define MN_fxam 0x2cd4
|
|
|
|
#define MN_fprem 0x2cd9
|
|
|
|
#define MN_fcom 0x2cdf
|
|
|
|
#define MN_ficom 0x2ce4
|
|
|
|
#define MN_fucom 0x2cea
|
|
|
|
#define MN_fsetpm 0x2cf0
|
|
|
|
#define MN_fnsetpm 0x2cf7
|
|
|
|
#define MN_frstpm 0x2cff
|
|
|
|
#define MN_vpperm 0x2d06
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pcmpestrm (MN_vpcmpestrm + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpcmpestrm 0x2d0d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pcmpistrm (MN_vpcmpistrm + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpcmpistrm 0x2d18
|
|
|
|
#define MN_rsm 0x2d23
|
|
|
|
#define MN_fpatan 0x2d27
|
|
|
|
#define MN_fptan 0x2d2e
|
|
|
|
#define MN_bndcn 0x2d34
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_andn (MN_pandn + 1)
|
|
|
|
#define MN_pandn (MN_vpandn + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpandn 0x2d3a
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_in (MN_xbegin + 4)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_xbegin 0x2d41
|
|
|
|
#define MN_pfmin 0x2d48
|
|
|
|
#define MN_fsin 0x2d4e
|
|
|
|
#define MN_vmxon 0x2d53
|
|
|
|
#define MN_vmrun 0x2d59
|
|
|
|
#define MN_jo 0x2d5f
|
|
|
|
#define MN_jno 0x2d62
|
|
|
|
#define MN_ccmpno 0x2d66
|
|
|
|
#define MN_setno 0x2d6d
|
|
|
|
#define MN_ctestno 0x2d73
|
|
|
|
#define MN_setzuno 0x2d7b
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovno (MN_cfcmovno + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovno 0x2d83
|
|
|
|
#define MN_jpo 0x2d8c
|
|
|
|
#define MN_ccmpo 0x2d90
|
|
|
|
#define MN_setpo 0x2d96
|
|
|
|
#define MN_setzupo 0x2d9c
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovpo (MN_cfcmovpo + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
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#define MN_cfcmovpo 0x2da4
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#define MN_cqo 0x2dad
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#define MN_tilezero 0x2db1
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#define MN_clzero 0x2dba
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#define MN_seto 0x2dc1
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#define MN_into 0x2dc6
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#define MN_cqto 0x2dcb
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#define MN_ctesto 0x2dd0
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#define MN_ssto 0x2dd7
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#define MN_setzuo 0x2ddc
|
2024-07-04 15:49:16 +08:00
|
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|
#define MN_cmovo (MN_cfcmovo + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_cfcmovo 0x2de3
|
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|
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#define MN_push2p 0x2deb
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|
#define MN_pop2p 0x2df2
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#define MN_bswap 0x2df8
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#define MN_fsubp 0x2dfe
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#define MN_pfrcp 0x2e04
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|
#define MN_rdtscp 0x2e0a
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#define MN_faddp 0x2e11
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#define MN_pdep 0x2e17
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#define MN_ffreep 0x2e1c
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#define MN_rep 0x2e23
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#define MN_pushp 0x2e27
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#define MN_fcomip 0x2e2d
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#define MN_fucomip 0x2e34
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|
|
#define MN_jp 0x2e3c
|
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|
|
#define MN_fmulp 0x2e3f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmp (MN_scmp + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
|
#define MN_scmp 0x2e45
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_jmp (MN_ljmp + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_ljmp 0x2e4a
|
|
|
|
#define MN_fcomp 0x2e4f
|
|
|
|
#define MN_ficomp 0x2e55
|
|
|
|
#define MN_fucomp 0x2e5c
|
|
|
|
#define MN_jnp 0x2e63
|
|
|
|
#define MN_setnp 0x2e67
|
|
|
|
#define MN_setzunp 0x2e6d
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovnp (MN_cfcmovnp + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_cfcmovnp 0x2e75
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_nop (MN_fnop + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
|
#define MN_fnop 0x2e7e
|
|
|
|
#define MN_loop 0x2e83
|
|
|
|
#define MN_pop 0x2e88
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|
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|
#define MN_fcompp 0x2e8c
|
|
|
|
#define MN_fucompp 0x2e93
|
|
|
|
#define MN_popp 0x2e9b
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|
#define MN_fsubrp 0x2ea0
|
|
|
|
#define MN_fdivrp 0x2ea7
|
|
|
|
#define MN_rstorssp 0x2eae
|
|
|
|
#define MN_saveprevssp 0x2eb7
|
|
|
|
#define MN_setp 0x2ec3
|
|
|
|
#define MN_fbstp 0x2ec8
|
|
|
|
#define MN_fdecstp 0x2ece
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|
|
|
#define MN_fincstp 0x2ed6
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|
|
|
#define MN_fstp 0x2ede
|
|
|
|
#define MN_fistp 0x2ee3
|
|
|
|
#define MN_fisttp 0x2ee9
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movddup (MN_vmovddup + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
|
#define MN_vmovddup 0x2ef0
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movshdup (MN_vmovshdup + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovshdup 0x2ef9
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movsldup (MN_vmovsldup + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovsldup 0x2f03
|
|
|
|
#define MN_setzup 0x2f0d
|
|
|
|
#define MN_fdivp 0x2f14
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovp (MN_cfcmovp + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_cfcmovp 0x2f1a
|
|
|
|
#define MN_vpbroadcastmb2q 0x2f22
|
|
|
|
#define MN_vpermi2q 0x2f32
|
|
|
|
#define MN_vpmovm2q 0x2f3b
|
|
|
|
#define MN_movdq2q 0x2f44
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|
|
|
#define MN_vpermt2q 0x2f4c
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|
|
|
#define MN_vpshaq 0x2f55
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|
|
|
#define MN_vpsraq 0x2f5c
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|
|
|
#define MN_vphaddbq 0x2f63
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|
|
|
#define MN_vphaddubq 0x2f6c
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psubq (MN_vpsubq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsubq 0x2f76
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmovsxbq (MN_vpmovsxbq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmovsxbq 0x2f7d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmovzxbq (MN_vpmovzxbq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmovzxbq 0x2f87
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvttpd2dq (MN_vcvttpd2dq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvttpd2dq 0x2f91
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvtpd2dq (MN_vcvtpd2dq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvtpd2dq 0x2f9c
|
|
|
|
#define MN_vcvttph2dq 0x2fa6
|
|
|
|
#define MN_vcvtph2dq 0x2fb1
|
|
|
|
#define MN_movq2dq 0x2fbb
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvttps2dq (MN_vcvttps2dq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvttps2dq 0x2fc3
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvtps2dq (MN_vcvtps2dq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvtps2dq 0x2fce
|
|
|
|
#define MN_vphsubdq 0x2fd8
|
|
|
|
#define MN_cdq 0x2fe1
|
|
|
|
#define MN_kaddq 0x2fe5
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_paddq (MN_vpaddq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpaddq 0x2feb
|
|
|
|
#define MN_vphadddq 0x2ff2
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_punpckhdq (MN_vpunpckhdq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpunpckhdq 0x2ffb
|
|
|
|
#define MN_kunpckdq 0x3006
|
|
|
|
#define MN_vpshldq 0x300f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_punpckldq (MN_vpunpckldq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpunpckldq 0x3017
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pslldq (MN_vpslldq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpslldq 0x3022
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psrldq (MN_vpsrldq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsrldq 0x302a
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmuldq (MN_vpmuldq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmuldq 0x3032
|
|
|
|
#define MN_kandq 0x303a
|
|
|
|
#define MN_vpandq 0x3040
|
|
|
|
#define MN_vpexpandq 0x3047
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_punpckhqdq (MN_vpunpckhqdq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpunpckhqdq 0x3051
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pclmulhqhqdq (MN_vpclmulhqhqdq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpclmulhqhqdq 0x305d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pclmullqhqdq (MN_vpclmullqhqdq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpclmullqhqdq 0x306b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_punpcklqdq (MN_vpunpcklqdq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpunpcklqdq 0x3079
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pclmulhqlqdq (MN_vpclmulhqlqdq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpclmulhqlqdq 0x3085
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pclmullqlqdq (MN_vpclmullqlqdq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpclmullqlqdq 0x3093
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pclmulqdq (MN_vpclmulqdq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpclmulqdq 0x30a1
|
|
|
|
#define MN_vpgatherdq 0x30ac
|
|
|
|
#define MN_vpscatterdq 0x30b7
|
|
|
|
#define MN_vpshrdq 0x30c3
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movntdq (MN_vmovntdq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovntdq 0x30cb
|
|
|
|
#define MN_vcvttpd2udq 0x30d4
|
|
|
|
#define MN_vcvtpd2udq 0x30e0
|
|
|
|
#define MN_vcvttph2udq 0x30eb
|
|
|
|
#define MN_vcvtph2udq 0x30f7
|
|
|
|
#define MN_vcvttps2udq 0x3102
|
|
|
|
#define MN_vcvtps2udq 0x310e
|
|
|
|
#define MN_vphaddudq 0x3119
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmuludq (MN_vpmuludq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmuludq 0x3123
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmovsxdq (MN_vpmovsxdq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmovsxdq 0x312c
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmovzxdq (MN_vpmovzxdq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmovzxdq 0x3136
|
|
|
|
#define MN_vpcomgeq 0x3140
|
|
|
|
#define MN_vpcomleq 0x3149
|
|
|
|
#define MN_vpcmpnleq 0x3152
|
|
|
|
#define MN_vpcmpleq 0x315c
|
|
|
|
#define MN_pfcmpeq 0x3165
|
|
|
|
#define MN_vpcomfalseq 0x316d
|
|
|
|
#define MN_vpcomtrueq 0x3179
|
|
|
|
#define MN_vpternlogq 0x3184
|
|
|
|
#define MN_vpshlq 0x318f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psllq (MN_vpsllq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsllq 0x3196
|
|
|
|
#define MN_vpmullq 0x319d
|
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|
|
#define MN_vprolq 0x31a5
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psrlq (MN_vpsrlq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsrlq 0x31ac
|
|
|
|
#define MN_kshiftlq 0x31b3
|
|
|
|
#define MN_vpblendmq 0x31bc
|
|
|
|
#define MN_vptestnmq 0x31c6
|
|
|
|
#define MN_vpcomq 0x31d0
|
|
|
|
#define MN_vpermq 0x31d7
|
|
|
|
#define MN_vptestmq 0x31de
|
|
|
|
#define MN_kandnq 0x31e7
|
|
|
|
#define MN_vpandnq 0x31ee
|
|
|
|
#define MN_valignq 0x31f6
|
|
|
|
#define MN_vpcmpq 0x31fe
|
|
|
|
#define MN_incsspq 0x3205
|
|
|
|
#define MN_rdsspq 0x320d
|
|
|
|
#define MN_vcvttpd2qq 0x3214
|
|
|
|
#define MN_vcvtpd2qq 0x321f
|
|
|
|
#define MN_vcvttph2qq 0x3229
|
|
|
|
#define MN_vcvtph2qq 0x3234
|
|
|
|
#define MN_vcvttps2qq 0x323e
|
|
|
|
#define MN_vcvtps2qq 0x3249
|
|
|
|
#define MN_vpcomeqq 0x3253
|
|
|
|
#define MN_vpcomneqq 0x325c
|
|
|
|
#define MN_vpcmpneqq 0x3266
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pcmpeqq (MN_vpcmpeqq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpcmpeqq 0x3270
|
|
|
|
#define MN_vpgatherqq 0x3279
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|
|
|
#define MN_vpscatterqq 0x3284
|
|
|
|
#define MN_vcvttpd2uqq 0x3290
|
|
|
|
#define MN_vcvtpd2uqq 0x329c
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|
|
#define MN_vcvttph2uqq 0x32a7
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|
|
|
#define MN_vcvtph2uqq 0x32b3
|
|
|
|
#define MN_vcvttps2uqq 0x32be
|
|
|
|
#define MN_vcvtps2uqq 0x32ca
|
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|
#define MN_korq 0x32d5
|
|
|
|
#define MN_kxnorq 0x32da
|
|
|
|
#define MN_vporq 0x32e1
|
|
|
|
#define MN_vprorq 0x32e7
|
|
|
|
#define MN_kxorq 0x32ee
|
|
|
|
#define MN_vpxorq 0x32f4
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pinsrq (MN_vpinsrq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpinsrq 0x32fb
|
|
|
|
#define MN_kshiftrq 0x3303
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_extrq (MN_pextrq + 1)
|
|
|
|
#define MN_pextrq (MN_vpextrq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vpextrq 0x330c
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#define MN_vpabsq 0x3314
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#define MN_vpminsq 0x331b
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#define MN_vpcompressq 0x3323
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#define MN_wrssq 0x332f
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#define MN_wrussq 0x3335
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#define MN_vpmaxsq 0x333c
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#define MN_vp2intersectq 0x3344
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#define MN_vpconflictq 0x3352
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#define MN_vpcomgtq 0x335e
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2023-01-20 10:16:17 +01:00
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#define MN_pcmpgtq (MN_vpcmpgtq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vpcmpgtq 0x3367
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#define MN_cltq 0x3370
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#define MN_vpcomltq 0x3375
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#define MN_vpcmpnltq 0x337e
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#define MN_vpcmpltq 0x3388
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#define MN_vpopcntq 0x3391
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#define MN_vplzcntq 0x339a
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#define MN_movntq 0x33a3
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#define MN_knotq 0x33aa
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#define MN_vprotq 0x33b0
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#define MN_insertq 0x33b7
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#define MN_vpbroadcastq 0x33bf
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#define MN_ktestq 0x33cc
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#define MN_kortestq 0x33d3
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#define MN_vpcomgeuq 0x33dc
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#define MN_vpcomleuq 0x33e6
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#define MN_vpcmpnleuq 0x33f0
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#define MN_vpcmpleuq 0x33fb
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#define MN_vpcomfalseuq 0x3405
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#define MN_vpcomtrueuq 0x3412
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#define MN_vpmadd52huq 0x341e
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#define MN_vpmadd52luq 0x342a
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#define MN_vpcomuq 0x3436
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#define MN_vpminuq 0x343e
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#define MN_vpcmpuq 0x3446
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#define MN_vpcomequq 0x344e
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#define MN_vpcomnequq 0x3458
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#define MN_vpcmpnequq 0x3463
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#define MN_vpcmpequq 0x346e
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#define MN_vpcomgtuq 0x3478
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#define MN_vpcomltuq 0x3482
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#define MN_vpcmpnltuq 0x348c
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#define MN_vpcmpltuq 0x3497
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#define MN_vpmaxuq 0x34a1
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#define MN_vpsravq 0x34a9
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#define MN_vpshldvq 0x34b1
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#define MN_vpshrdvq 0x34ba
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#define MN_vpsllvq 0x34c3
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#define MN_vprolvq 0x34cb
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#define MN_vpsrlvq 0x34d3
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2023-01-20 10:16:17 +01:00
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#define MN_movq (MN_kmovq + 1)
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#define MN_kmovq (MN_maskmovq + 3)
|
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#define MN_maskmovq (MN_vpmaskmovq + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vpmaskmovq 0x34db
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|
#define MN_vmovq 0x34e6
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|
#define MN_vprorvq 0x34ec
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|
#define MN_vphaddwq 0x34f4
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#define MN_vphadduwq 0x34fd
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmovsxwq (MN_vpmovsxwq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmovsxwq 0x3507
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmovzxwq (MN_vpmovzxwq + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmovzxwq 0x3511
|
|
|
|
#define MN_rex_r 0x351b
|
|
|
|
#define MN_vmclear 0x3521
|
|
|
|
#define MN_lar 0x3529
|
|
|
|
#define MN_sar 0x352d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_fsubr (MN_pfsubr + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_pfsubr 0x3531
|
|
|
|
#define MN_fisubr 0x3538
|
|
|
|
#define MN_rcr 0x353f
|
|
|
|
#define MN_vzeroupper 0x3543
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_enter (MN_sysenter + 3)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_sysenter 0x354e
|
|
|
|
#define MN_shr 0x3557
|
|
|
|
#define MN_clr 0x355b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_palignr (MN_vpalignr + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpalignr 0x355f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_or (MN_aor + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_aor 0x3568
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_por (MN_vpor + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpor 0x356c
|
|
|
|
#define MN_ror 0x3571
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_monitor (MN_umonitor + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_umonitor 0x3575
|
|
|
|
#define MN_frstor 0x357e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_xrstor (MN_fxrstor + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_fxrstor 0x3585
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_xor (MN_axor + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_axor 0x358d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pxor (MN_vpxor + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpxor 0x3592
|
|
|
|
#define MN_verr 0x3598
|
|
|
|
#define MN_bsr 0x359d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_ldmxcsr (MN_vldmxcsr + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vldmxcsr 0x35a1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_stmxcsr (MN_vstmxcsr + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vstmxcsr 0x35aa
|
|
|
|
#define MN_blsr 0x35b3
|
2023-10-31 16:23:53 +08:00
|
|
|
#define MN_rdmsr (MN_urdmsr + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_urdmsr 0x35b8
|
2023-10-31 16:23:53 +08:00
|
|
|
#define MN_wrmsr (MN_uwrmsr + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_uwrmsr 0x35bf
|
|
|
|
#define MN_btr 0x35c6
|
|
|
|
#define MN_xcrypt_ctr 0x35ca
|
|
|
|
#define MN_xcryptctr 0x35d5
|
|
|
|
#define MN_ltr 0x35df
|
|
|
|
#define MN_str 0x35e3
|
|
|
|
#define MN_bextr 0x35e7
|
|
|
|
#define MN_fdivr 0x35ed
|
|
|
|
#define MN_fidivr 0x35f3
|
|
|
|
#define MN_rex_wr 0x35fa
|
|
|
|
#define MN_vcvtne2ph2bf8s 0x3601
|
|
|
|
#define MN_vcvtneph2bf8s 0x3610
|
|
|
|
#define MN_vcvtbiasph2bf8s 0x361e
|
|
|
|
#define MN_vcvtne2ph2hf8s 0x362e
|
|
|
|
#define MN_vcvtneph2hf8s 0x363d
|
|
|
|
#define MN_vcvtbiasph2hf8s 0x364b
|
|
|
|
#define MN_aas 0x365b
|
|
|
|
#define MN_scas 0x365f
|
|
|
|
#define MN_das 0x3664
|
|
|
|
#define MN_fabs 0x3668
|
|
|
|
#define MN_jmpabs 0x366d
|
|
|
|
#define MN_movabs 0x3674
|
|
|
|
#define MN_vcvtnebf162ibs 0x367b
|
|
|
|
#define MN_vcvttbf162ibs 0x368a
|
|
|
|
#define MN_vcvttph2ibs 0x3698
|
|
|
|
#define MN_vcvtph2ibs 0x36a4
|
|
|
|
#define MN_vcvttps2ibs 0x36af
|
|
|
|
#define MN_vcvtps2ibs 0x36bb
|
|
|
|
#define MN_vcvtnebf162iubs 0x36c6
|
|
|
|
#define MN_vcvttbf162iubs 0x36d6
|
|
|
|
#define MN_vcvttph2iubs 0x36e5
|
|
|
|
#define MN_vcvtph2iubs 0x36f2
|
|
|
|
#define MN_vcvttps2iubs 0x36fe
|
|
|
|
#define MN_vcvtps2iubs 0x370b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cs (MN_blcs + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_blcs 0x3717
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_ds (MN_lds + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_lds 0x371c
|
|
|
|
#define MN_enqcmds 0x3720
|
|
|
|
#define MN_lods 0x3728
|
|
|
|
#define MN_vpdpbssds 0x372d
|
|
|
|
#define MN_vp4dpwssds 0x3737
|
|
|
|
#define MN_vpdpwssds 0x3742
|
|
|
|
#define MN_vpdpbusds 0x374c
|
|
|
|
#define MN_vpdpwusds 0x3756
|
|
|
|
#define MN_vpdpbsuds 0x3760
|
|
|
|
#define MN_vpdpwsuds 0x376a
|
|
|
|
#define MN_vpdpbuuds 0x3774
|
|
|
|
#define MN_vpdpwuuds 0x377e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_es (MN_les + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_les 0x3788
|
|
|
|
#define MN_xsaves 0x378c
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_fs (MN_lfs + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_lfs 0x3793
|
2023-05-19 19:00:55 +08:00
|
|
|
#define MN_gs (MN_lkgs + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_lkgs 0x3797
|
|
|
|
#define MN_lgs 0x379c
|
|
|
|
#define MN_swapgs 0x37a0
|
|
|
|
#define MN_fchs 0x37a7
|
|
|
|
#define MN_vcvttsd2sis 0x37ac
|
|
|
|
#define MN_vcvttss2sis 0x37b8
|
|
|
|
#define MN_vcvttsd2usis 0x37c4
|
|
|
|
#define MN_vcvttss2usis 0x37d1
|
|
|
|
#define MN_js 0x37de
|
|
|
|
#define MN_encls 0x37e1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_emms (MN_femms + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_femms 0x37e7
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_ins (MN_lwpins + 3)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_lwpins 0x37ed
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#define MN_jns 0x37f4
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#define MN_ccmpns 0x37f8
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#define MN_wrmsrns 0x37ff
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#define MN_setns 0x3807
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#define MN_ctestns 0x380d
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#define MN_setzuns 0x3815
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2024-07-04 15:49:16 +08:00
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#define MN_cmovns (MN_cfcmovns + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_cfcmovns 0x381d
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#define MN_fcos 0x3826
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#define MN_fsincos 0x382b
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#define MN_stos 0x3833
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#define MN_vfmaddsub231ps 0x3838
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#define MN_vfmsub231ps 0x3847
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#define MN_vfnmsub231ps 0x3853
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#define MN_vfmsubadd231ps 0x3860
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#define MN_vfmadd231ps 0x386f
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#define MN_vfnmadd231ps 0x387b
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#define MN_vfmaddsub132ps 0x3888
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#define MN_vfmsub132ps 0x3897
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#define MN_vfnmsub132ps 0x38a3
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#define MN_vfmsubadd132ps 0x38b0
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#define MN_vfmadd132ps 0x38bf
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#define MN_vfnmadd132ps 0x38cb
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#define MN_vcvtneebf162ps 0x38d8
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#define MN_vbcstnebf162ps 0x38e7
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#define MN_vcvtneobf162ps 0x38f6
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2023-01-20 10:16:17 +01:00
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#define MN_cvtpd2ps (MN_vcvtpd2ps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vcvtpd2ps 0x3905
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#define MN_vcvtneeph2ps 0x390f
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#define MN_vcvtneoph2ps 0x391c
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#define MN_vcvtph2ps 0x3929
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#define MN_vbcstnesh2ps 0x3933
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#define MN_vpermi2ps 0x3940
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#define MN_cvtpi2ps 0x394a
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#define MN_vpermil2ps 0x3953
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#define MN_vexp2ps 0x395e
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2023-01-20 10:16:17 +01:00
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#define MN_cvtdq2ps (MN_vcvtdq2ps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vcvtdq2ps 0x3966
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#define MN_vcvtudq2ps 0x3970
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#define MN_vcvtqq2ps 0x397b
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#define MN_vcvtuqq2ps 0x3985
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#define MN_vpermt2ps 0x3990
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#define MN_vfmaddsub213ps 0x399a
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#define MN_vfmsub213ps 0x39a9
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#define MN_vfnmsub213ps 0x39b5
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#define MN_vfmsubadd213ps 0x39c2
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#define MN_vfmadd213ps 0x39d1
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#define MN_vfnmadd213ps 0x39dd
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#define MN_vrcp14ps 0x39ea
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#define MN_vrsqrt14ps 0x39f3
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#define MN_tdpbf16ps (MN_ttdpbf16ps + 1)
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#define MN_ttdpbf16ps 0x39fe
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#define MN_vdpbf16ps 0x3a09
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#define MN_tcmmrlfp16ps (MN_ttcmmrlfp16ps + 1)
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#define MN_ttcmmrlfp16ps 0x3a13
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#define MN_tcmmimfp16ps (MN_tconjtcmmimfp16ps + 5)
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#define MN_tconjtcmmimfp16ps 0x3a21
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#define MN_ttcmmimfp16ps 0x3a33
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#define MN_tdpfp16ps (MN_ttdpfp16ps + 1)
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#define MN_ttdpfp16ps 0x3a41
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#define MN_vrcp28ps 0x3a4c
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#define MN_vrsqrt28ps 0x3a55
|
2023-01-20 10:16:17 +01:00
|
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#define MN_movaps (MN_vmovaps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovaps 0x3a60
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_subps (MN_addsubps + 3)
|
|
|
|
#define MN_addsubps (MN_vfmaddsubps + 3)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vfmaddsubps 0x3a68
|
|
|
|
#define MN_vaddsubps 0x3a74
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_hsubps (MN_vhsubps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vhsubps 0x3a7e
|
|
|
|
#define MN_vfmsubps 0x3a86
|
|
|
|
#define MN_vfnmsubps 0x3a8f
|
|
|
|
#define MN_vsubps 0x3a99
|
|
|
|
#define MN_vgatherpf0dps 0x3aa0
|
|
|
|
#define MN_vscatterpf0dps 0x3aae
|
|
|
|
#define MN_vgatherpf1dps 0x3abd
|
|
|
|
#define MN_vscatterpf1dps 0x3acb
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_addps (MN_vfmsubaddps + 6)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vfmsubaddps 0x3ada
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_haddps (MN_vhaddps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vhaddps 0x3ae6
|
|
|
|
#define MN_v4fmaddps 0x3aee
|
|
|
|
#define MN_vfmaddps 0x3af8
|
|
|
|
#define MN_v4fnmaddps 0x3b01
|
|
|
|
#define MN_vfnmaddps 0x3b0c
|
|
|
|
#define MN_vaddps 0x3b16
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_andps (MN_vexpandps + 4)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vexpandps 0x3b1d
|
|
|
|
#define MN_vandps 0x3b27
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_blendps (MN_vblendps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vblendps 0x3b2e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_roundps (MN_vroundps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vroundps 0x3b37
|
|
|
|
#define MN_vgatherdps 0x3b40
|
|
|
|
#define MN_vscatterdps 0x3b4b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpunordps (MN_vcmpunordps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpunordps 0x3b57
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpordps (MN_vcmpordps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpordps 0x3b63
|
|
|
|
#define MN_vreduceps 0x3b6d
|
|
|
|
#define MN_vrangeps 0x3b77
|
|
|
|
#define MN_vcmpngeps 0x3b80
|
|
|
|
#define MN_vcmpgeps 0x3b8a
|
|
|
|
#define MN_vrndscaleps 0x3b93
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpnleps (MN_vcmpnleps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpnleps 0x3b9f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpleps (MN_vcmpleps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpleps 0x3ba9
|
|
|
|
#define MN_vcmpfalseps 0x3bb2
|
|
|
|
#define MN_vcmptrueps 0x3bbe
|
|
|
|
#define MN_vscalefps 0x3bc9
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_shufps (MN_vshufps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vshufps 0x3bd3
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_unpckhps (MN_vunpckhps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vunpckhps 0x3bdb
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movlhps (MN_vmovlhps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovlhps 0x3be5
|
|
|
|
#define MN_vdpphps 0x3bee
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movhps (MN_vmovhps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovhps 0x3bf6
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movmskps (MN_vmovmskps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovmskps 0x3bfe
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movhlps (MN_vmovhlps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovhlps 0x3c08
|
|
|
|
#define MN_vpermilps 0x3c11
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_unpcklps (MN_vunpcklps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vunpcklps 0x3c1b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_mulps (MN_vmulps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmulps 0x3c25
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movlps (MN_vmovlps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovlps 0x3c2c
|
Support APX CCMP and CTEST
CCMP and CTEST are two new sets of instructions for conditional CMP
and TEST, SCC and OSZC flags are given as suffixes of CCMP or CTEST
in the instruction mnemonic, e.g.:
ccmp<cc> { dfv=sf , cf , of } %eax, %ecx
also add
{evex} cmp/test %eax, %ecx
as an alias for ccmpt.
For the encoder part, add function check_Scc_OszcOperation to parse
'{ dfv=of , sf, sf, cf}', store scc in the lower 4 bits of base_opcode,
and adjust base_opcode to its normal meaning in install_template.
For the decoder part, add 'SC' and 'DF' macros to add scc and oszc flags
suffixes.
gas/ChangeLog:
* config/tc-i386.c (OSZC_CF): New.
(OSZC_ZF): Ditto.
(OSZC_SF): Ditto.
(OSZC_OF): Ditto.
(set_oszc_flags): Set oszc flags and report error for using the same oszc flags twice.
(check_Scc_OszcOperations): Handle SCC OSZC flags.
(install_template): Add scc and oszc_flags.
(build_apx_evex_prefix): Encode SCC and oszc flags bits.
(parse_insn): Handle check_Scc_OszcOperations.
* testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d: Add ivalid test case.
* testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s: Ditto.
* testsuite/gas/i386/x86-64.exp: Add test for ccmp and ctest.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest-intel.d: New test.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest-inval.l: Ditto.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest-inval.s: Ditto.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest.d: Ditto.
* testsuite/gas/i386/x86-64-apx-ccmp-ctest.s: Ditto.
opcodes/ChangeLog:
* i386-dis-evex-reg.h: Add ccmp and ctest.
* i386-dis-evex.h: Ditto.
* i386-dis.c (struct instr_info): add scc.
(struct dis386): Add new micro 'NE','SC' and'DF'.
(get_valid_dis386): Get scc value and move MAP4 invalid check to print_insn.
(putop): Handle %NE, %SC and %DF.
* i386-opc.h (SCC): New.
* i386-opc.tbl: Add ccmp/ctest and evex format for cmp/test.
* i386-mnem.h: Regenerated.
* i386-tbl.h: Ditto.
2024-06-18 10:45:49 +08:00
|
|
|
#define MN_cmps (MN_ccmps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_ccmps 0x3c34
|
|
|
|
#define MN_vblendmps 0x3c3a
|
|
|
|
#define MN_vfixupimmps 0x3c44
|
|
|
|
#define MN_vpermps 0x3c50
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_andnps (MN_vandnps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vandnps 0x3c58
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_minps (MN_vminps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vminps 0x3c60
|
|
|
|
#define MN_seamops 0x3c67
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_rcpps (MN_vrcpps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vrcpps 0x3c6f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_dpps (MN_vdpps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vdpps 0x3c76
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpps (MN_vcmpps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpps 0x3c7c
|
|
|
|
#define MN_vgetexpps 0x3c83
|
|
|
|
#define MN_vgatherpf0qps 0x3c8d
|
|
|
|
#define MN_vscatterpf0qps 0x3c9b
|
|
|
|
#define MN_vgatherpf1qps 0x3caa
|
|
|
|
#define MN_vscatterpf1qps 0x3cb8
|
|
|
|
#define MN_vcmpunord_qps 0x3cc7
|
|
|
|
#define MN_vcmpord_qps 0x3cd5
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpneqps (MN_vcmpneqps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpneqps 0x3ce1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpeqps (MN_vcmpeqps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpeqps 0x3ceb
|
|
|
|
#define MN_vcmpge_oqps 0x3cf4
|
|
|
|
#define MN_vcmple_oqps 0x3d00
|
|
|
|
#define MN_vcmpfalse_oqps 0x3d0c
|
|
|
|
#define MN_vcmpneq_oqps 0x3d1b
|
|
|
|
#define MN_vcmpeq_oqps 0x3d28
|
|
|
|
#define MN_vcmpgt_oqps 0x3d34
|
|
|
|
#define MN_vcmplt_oqps 0x3d40
|
|
|
|
#define MN_vgatherqps 0x3d4c
|
|
|
|
#define MN_vscatterqps 0x3d57
|
|
|
|
#define MN_vcmpnge_uqps 0x3d63
|
|
|
|
#define MN_vcmpnle_uqps 0x3d70
|
|
|
|
#define MN_vcmptrue_uqps 0x3d7d
|
|
|
|
#define MN_vcmpneq_uqps 0x3d8b
|
|
|
|
#define MN_vcmpeq_uqps 0x3d98
|
|
|
|
#define MN_vcmpngt_uqps 0x3da4
|
|
|
|
#define MN_vcmpnlt_uqps 0x3db1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_orps (MN_vorps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vorps 0x3dbe
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_xorps (MN_vxorps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vxorps 0x3dc4
|
|
|
|
#define MN_vcmpunord_sps 0x3dcb
|
|
|
|
#define MN_vcmpord_sps 0x3dd9
|
|
|
|
#define MN_vcmpge_osps 0x3de5
|
|
|
|
#define MN_vcmple_osps 0x3df1
|
|
|
|
#define MN_vcmpfalse_osps 0x3dfd
|
|
|
|
#define MN_vcmpneq_osps 0x3e0c
|
|
|
|
#define MN_vcmpeq_osps 0x3e19
|
|
|
|
#define MN_vcmpgt_osps 0x3e25
|
|
|
|
#define MN_vcmplt_osps 0x3e31
|
|
|
|
#define MN_vfpclassps 0x3e3d
|
|
|
|
#define MN_vcompressps 0x3e48
|
|
|
|
#define MN_vcmpnge_usps 0x3e54
|
|
|
|
#define MN_vcmpnle_usps 0x3e61
|
|
|
|
#define MN_vcmptrue_usps 0x3e6e
|
|
|
|
#define MN_vcmpneq_usps 0x3e7c
|
|
|
|
#define MN_vcmpeq_usps 0x3e89
|
|
|
|
#define MN_vcmpngt_usps 0x3e95
|
|
|
|
#define MN_vcmpnlt_usps 0x3ea2
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_extractps (MN_vextractps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
|
#define MN_vextractps 0x3eaf
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|
|
|
#define MN_vcmpngtps 0x3eba
|
|
|
|
#define MN_vcmpgtps 0x3ec4
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpnltps (MN_vcmpnltps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpnltps 0x3ecd
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpltps (MN_vcmpltps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpltps 0x3ed7
|
|
|
|
#define MN_vgetmantps 0x3ee0
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movntps (MN_vmovntps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovntps 0x3eeb
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_insertps (MN_vinsertps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vinsertps 0x3ef4
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_sqrtps (MN_rsqrtps + 1)
|
|
|
|
#define MN_rsqrtps (MN_vrsqrtps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vrsqrtps 0x3efe
|
|
|
|
#define MN_vsqrtps 0x3f07
|
|
|
|
#define MN_vtestps 0x3f0f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movups (MN_vmovups + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmovups 0x3f17
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_blendvps (MN_vblendvps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vblendvps 0x3f1f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_divps (MN_vdivps + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
|
#define MN_vdivps 0x3f29
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|
|
|
#define MN_vmaskmovps 0x3f30
|
Support Intel AVX10.2 minmax, vector copy and compare instructions
In this patch, we will support AVX10.2 minmax, vector copy and compare
instructions. This will finish the new instruction form support for
AVX10.2. Most of them are new instructions forms except for vmovd
and vmovw, which are extended usage from the old ones.
gas/ChangeLog:
* NEWS: Mention AVX10.2.
* testsuite/gas/i386/i386.exp: Add AVX10.2 tests.
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/avx10_2-256-5-intel.d: New test.
* testsuite/gas/i386/avx10_2-256-miscs.d: Ditto.
* testsuite/gas/i386/avx10_2-256-miscs.s: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs-intel.d: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs.d: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs.s: Ditto.
opcodes/ChangeLog:
* i386-dis-evex-len.h: Add EVEX_LEN_0F7E_P_1_W_1,
EVEX_LEN_0FD6_P_2_W_0, EVEX_LEN_MAP5_6E and EVEX_LEN_MAP5_7E.
* i386-dis-evex-prefix.h: Add PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F,
PREFIX_EVEX_0F3A52, PREFIX_EVEX_0F3A53, PREFIX_EVEX_MAP5_2E,
PREFIX_EVEX_MAP5_2F, PREFIX_EVEX_MAP5_6E and PREFIX_EVEX_MAP5_7E.
* i386-dis-evex-w.h: Adjust EVEX_W_0F3A42, EVEX_W_0F7E_P_1
and EVEX_W_0FD6. Add EVEX_W_MAP5_6E_P_1 and EVEX_W_MAP5_7E_P_1.
* i386-dis-evex.h: Add and adjust table entries for AVX10.2.
* i386-dis.c (PREFIX_EVEX_0F2E): New.
(PREFIX_EVEX_0F2F): Ditto.
(PREFIX_EVEX_0F3A52): Ditto.
(PREFIX_EVEX_0F3A53): Ditto.
(PREFIX_EVEX_MAP5_2E): Ditto.
(PREFIX_EVEX_MAP5_2F): Ditto.
(PREFIX_EVEX_MAP5_6E_L_0): Ditto.
(PREFIX_EVEX_MAP5_7E_L_0): Ditto.
(EVEX_LEN_0F7E_P_1_W_1): Ditto.
(EVEX_LEN_0FD6_P_2_W_0): Ditto.
(EVEX_LEN_MAP5_6E): Ditto.
(EVEX_LEN_MAP5_7E): Ditto.
(EVEX_W_MAP5_6E_P_1): Ditto.
(EVEX_W_MAP5_7E_P_1): Ditto.
* i386-opc.tbl: Add AVX10.2 instructions.
* i386-mnem.h: Regenerated.
* i386-tbl.h: Ditto.
Co-authored-by: Jun Zhang <jun.zhang@intel.com>
Co-authored-by: Zewei Mo <zewei.mo@intel.com>
2024-12-23 11:32:03 +08:00
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|
|
#define MN_maxps (MN_vminmaxps + 4)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vminmaxps 0x3f3b
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|
|
|
#define MN_vmaxps 0x3f45
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|
|
|
#define MN_vfrczps 0x3f4c
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|
|
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#define MN_vcvttpd2dqs 0x3f54
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|
|
|
#define MN_vcvttps2dqs 0x3f60
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|
|
|
#define MN_vcvttpd2udqs 0x3f6c
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|
|
|
#define MN_vcvttps2udqs 0x3f79
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|
|
|
#define MN_vcvttpd2qqs 0x3f86
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|
|
|
#define MN_vcvttps2qqs 0x3f92
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|
|
|
#define MN_vcvttpd2uqqs 0x3f9e
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|
|
|
#define MN_vcvttps2uqqs 0x3fab
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|
|
|
#define MN_xrstors 0x3fb8
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_ss (MN_vfmsub231ss + 9)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vfmsub231ss 0x3fc0
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|
|
|
#define MN_vfnmsub231ss 0x3fcc
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|
|
|
#define MN_vfmadd231ss 0x3fd9
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|
|
|
#define MN_vfnmadd231ss 0x3fe5
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|
|
|
#define MN_vfmsub132ss 0x3ff2
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|
|
|
#define MN_vfnmsub132ss 0x3ffe
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|
|
|
#define MN_vfmadd132ss 0x400b
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|
|
|
#define MN_vfnmadd132ss 0x4017
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvtsd2ss (MN_vcvtsd2ss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
|
#define MN_vcvtsd2ss 0x4024
|
|
|
|
#define MN_vcvtsh2ss 0x402e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cvtsi2ss (MN_vcvtsi2ss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcvtsi2ss 0x4038
|
|
|
|
#define MN_vcvtusi2ss 0x4042
|
|
|
|
#define MN_vfmsub213ss 0x404d
|
|
|
|
#define MN_vfnmsub213ss 0x4059
|
|
|
|
#define MN_vfmadd213ss 0x4066
|
|
|
|
#define MN_vfnmadd213ss 0x4072
|
|
|
|
#define MN_vrcp14ss 0x407f
|
|
|
|
#define MN_vrsqrt14ss 0x4088
|
|
|
|
#define MN_vrcp28ss 0x4093
|
|
|
|
#define MN_vrsqrt28ss 0x409c
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_subss (MN_vfmsubss + 3)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vfmsubss 0x40a7
|
|
|
|
#define MN_vfnmsubss 0x40b0
|
|
|
|
#define MN_vsubss 0x40ba
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_addss (MN_v4fmaddss + 4)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_v4fmaddss 0x40c1
|
|
|
|
#define MN_vfmaddss 0x40cb
|
|
|
|
#define MN_v4fnmaddss 0x40d4
|
|
|
|
#define MN_vfnmaddss 0x40df
|
|
|
|
#define MN_vaddss 0x40e9
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_roundss (MN_vroundss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vroundss 0x40f0
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpunordss (MN_vcmpunordss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpunordss 0x40f9
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpordss (MN_vcmpordss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpordss 0x4105
|
|
|
|
#define MN_vreducess 0x410f
|
|
|
|
#define MN_vrangess 0x4119
|
|
|
|
#define MN_vcmpngess 0x4122
|
|
|
|
#define MN_vcmpgess 0x412c
|
|
|
|
#define MN_vrndscaless 0x4135
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpnless (MN_vcmpnless + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpnless 0x4141
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpless (MN_vcmpless + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpless 0x414b
|
|
|
|
#define MN_vcmpfalsess 0x4154
|
|
|
|
#define MN_vcmptruess 0x4160
|
|
|
|
#define MN_vscalefss 0x416b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_comiss (MN_ucomiss + 1)
|
|
|
|
#define MN_ucomiss (MN_vucomiss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vucomiss 0x4175
|
|
|
|
#define MN_vcomiss 0x417e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_lss (MN_mulss + 2)
|
|
|
|
#define MN_mulss (MN_vmulss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmulss 0x4186
|
|
|
|
#define MN_vfixupimmss 0x418d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_minss (MN_vminss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vminss 0x4199
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_rcpss (MN_vrcpss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vrcpss 0x41a0
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpss (MN_vcmpss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpss 0x41a7
|
|
|
|
#define MN_vgetexpss 0x41ae
|
|
|
|
#define MN_vcmpunord_qss 0x41b8
|
|
|
|
#define MN_vcmpord_qss 0x41c6
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpneqss (MN_vcmpneqss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpneqss 0x41d2
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpeqss (MN_vcmpeqss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
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#define MN_vcmpeqss 0x41dc
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|
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#define MN_vcmpge_oqss 0x41e5
|
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#define MN_vcmple_oqss 0x41f1
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#define MN_vcmpfalse_oqss 0x41fd
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#define MN_vcmpneq_oqss 0x420c
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#define MN_vcmpeq_oqss 0x4219
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|
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|
#define MN_vcmpgt_oqss 0x4225
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#define MN_vcmplt_oqss 0x4231
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#define MN_vcmpnge_uqss 0x423d
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#define MN_vcmpnle_uqss 0x424a
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#define MN_vcmptrue_uqss 0x4257
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#define MN_vcmpneq_uqss 0x4265
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#define MN_vcmpeq_uqss 0x4272
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#define MN_vcmpngt_uqss 0x427e
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|
#define MN_vcmpnlt_uqss 0x428b
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|
#define MN_vcmpunord_sss 0x4298
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|
#define MN_vcmpord_sss 0x42a6
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|
#define MN_vcmpge_osss 0x42b2
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#define MN_vcmple_osss 0x42be
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#define MN_vcmpfalse_osss 0x42ca
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#define MN_vcmpneq_osss 0x42d9
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#define MN_vcmpeq_osss 0x42e6
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|
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|
#define MN_vcmpgt_osss 0x42f2
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|
|
|
#define MN_vcmplt_osss 0x42fe
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|
|
|
#define MN_vfpclassss 0x430a
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#define MN_vcmpnge_usss 0x4315
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|
|
|
#define MN_vcmpnle_usss 0x4322
|
|
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#define MN_vcmptrue_usss 0x432f
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|
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|
#define MN_vcmpneq_usss 0x433d
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|
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#define MN_vcmpeq_usss 0x434a
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|
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|
#define MN_vcmpngt_usss 0x4356
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|
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#define MN_vcmpnlt_usss 0x4363
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#define MN_vcmpngtss 0x4370
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|
|
|
#define MN_vcmpgtss 0x437a
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpnltss (MN_vcmpnltss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpnltss 0x4383
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_cmpltss (MN_vcmpltss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vcmpltss 0x438d
|
|
|
|
#define MN_vgetmantss 0x4396
|
|
|
|
#define MN_movntss 0x43a1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_sqrtss (MN_rsqrtss + 1)
|
|
|
|
#define MN_rsqrtss (MN_vrsqrtss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vrsqrtss 0x43a9
|
|
|
|
#define MN_vsqrtss 0x43b2
|
|
|
|
#define MN_vbroadcastss 0x43ba
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_divss (MN_vdivss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vdivss 0x43c7
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movss (MN_vmovss + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
|
#define MN_vmovss 0x43ce
|
Support Intel AVX10.2 minmax, vector copy and compare instructions
In this patch, we will support AVX10.2 minmax, vector copy and compare
instructions. This will finish the new instruction form support for
AVX10.2. Most of them are new instructions forms except for vmovd
and vmovw, which are extended usage from the old ones.
gas/ChangeLog:
* NEWS: Mention AVX10.2.
* testsuite/gas/i386/i386.exp: Add AVX10.2 tests.
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/avx10_2-256-5-intel.d: New test.
* testsuite/gas/i386/avx10_2-256-miscs.d: Ditto.
* testsuite/gas/i386/avx10_2-256-miscs.s: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs-intel.d: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs.d: Ditto.
* testsuite/gas/i386/avx10_2-512-miscs.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-miscs.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-miscs.s: Ditto.
opcodes/ChangeLog:
* i386-dis-evex-len.h: Add EVEX_LEN_0F7E_P_1_W_1,
EVEX_LEN_0FD6_P_2_W_0, EVEX_LEN_MAP5_6E and EVEX_LEN_MAP5_7E.
* i386-dis-evex-prefix.h: Add PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F,
PREFIX_EVEX_0F3A52, PREFIX_EVEX_0F3A53, PREFIX_EVEX_MAP5_2E,
PREFIX_EVEX_MAP5_2F, PREFIX_EVEX_MAP5_6E and PREFIX_EVEX_MAP5_7E.
* i386-dis-evex-w.h: Adjust EVEX_W_0F3A42, EVEX_W_0F7E_P_1
and EVEX_W_0FD6. Add EVEX_W_MAP5_6E_P_1 and EVEX_W_MAP5_7E_P_1.
* i386-dis-evex.h: Add and adjust table entries for AVX10.2.
* i386-dis.c (PREFIX_EVEX_0F2E): New.
(PREFIX_EVEX_0F2F): Ditto.
(PREFIX_EVEX_0F3A52): Ditto.
(PREFIX_EVEX_0F3A53): Ditto.
(PREFIX_EVEX_MAP5_2E): Ditto.
(PREFIX_EVEX_MAP5_2F): Ditto.
(PREFIX_EVEX_MAP5_6E_L_0): Ditto.
(PREFIX_EVEX_MAP5_7E_L_0): Ditto.
(EVEX_LEN_0F7E_P_1_W_1): Ditto.
(EVEX_LEN_0FD6_P_2_W_0): Ditto.
(EVEX_LEN_MAP5_6E): Ditto.
(EVEX_LEN_MAP5_7E): Ditto.
(EVEX_W_MAP5_6E_P_1): Ditto.
(EVEX_W_MAP5_7E_P_1): Ditto.
* i386-opc.tbl: Add AVX10.2 instructions.
* i386-mnem.h: Regenerated.
* i386-tbl.h: Ditto.
Co-authored-by: Jun Zhang <jun.zhang@intel.com>
Co-authored-by: Zewei Mo <zewei.mo@intel.com>
2024-12-23 11:32:03 +08:00
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|
|
#define MN_maxss (MN_vminmaxss + 4)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
|
#define MN_vminmaxss 0x43d5
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|
|
|
#define MN_vmaxss 0x43df
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|
|
|
#define MN_vucomxss 0x43e6
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|
|
|
#define MN_vcomxss 0x43ef
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|
|
|
#define MN_vfrczss 0x43f7
|
|
|
|
#define MN_bts 0x43ff
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|
|
|
#define MN_erets 0x4403
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|
|
|
#define MN_sets 0x4409
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|
|
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#define MN_clts 0x440e
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|
|
|
#define MN_ctests 0x4413
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|
|
|
#define MN_outs 0x441a
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|
|
|
#define MN_setzus 0x441f
|
2023-01-20 10:16:17 +01:00
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|
|
#define MN_movs (MN_cmovs + 1)
|
2024-07-04 15:49:16 +08:00
|
|
|
#define MN_cmovs (MN_cfcmovs + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_cfcmovs 0x4426
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|
|
|
#define MN_fldl2t 0x442e
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|
|
|
#define MN_xlat 0x4435
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|
|
|
#define MN_bt 0x443a
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|
|
|
#define MN_fxtract 0x443d
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|
|
|
#define MN_lgdt 0x4445
|
|
|
|
#define MN_sgdt 0x444a
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|
|
|
#define MN_lidt 0x444f
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|
|
|
#define MN_sidt 0x4454
|
|
|
|
#define MN_fldt 0x4459
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|
|
|
#define MN_lldt 0x445e
|
|
|
|
#define MN_sldt 0x4463
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_ret (MN_iret + 1)
|
|
|
|
#define MN_iret (MN_uiret + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_uiret 0x4468
|
|
|
|
#define MN_lret 0x446e
|
|
|
|
#define MN_seamret 0x4473
|
|
|
|
#define MN_sysret 0x447b
|
|
|
|
#define MN_hreset 0x4482
|
|
|
|
#define MN_pfcmpgt 0x4489
|
|
|
|
#define MN_ht 0x4491
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_wait (MN_fwait + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_fwait 0x4494
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_mwait (MN_umwait + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_umwait 0x449a
|
|
|
|
#define MN_mcommit 0x44a1
|
|
|
|
#define MN_finit 0x44a9
|
|
|
|
#define MN_skinit 0x44af
|
|
|
|
#define MN_fninit 0x44b6
|
|
|
|
#define MN_vmgexit 0x44bd
|
|
|
|
#define MN_sysexit 0x44c5
|
|
|
|
#define MN_hlt 0x44cd
|
|
|
|
#define MN_popcnt 0x44d1
|
|
|
|
#define MN_lzcnt 0x44d8
|
|
|
|
#define MN_tzcnt 0x44de
|
|
|
|
#define MN_hnt 0x44e4
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_int (MN_frndint + 4)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_frndint 0x44e8
|
|
|
|
#define MN_not 0x44f0
|
|
|
|
#define MN_invept 0x44f4
|
|
|
|
#define MN_ccmpt 0x44fb
|
|
|
|
#define MN_xsaveopt 0x4501
|
|
|
|
#define MN_clflushopt 0x450a
|
|
|
|
#define MN_fstpt 0x4515
|
|
|
|
#define MN_xabort 0x451b
|
|
|
|
#define MN_fsqrt 0x4522
|
|
|
|
#define MN_pfrsqrt 0x4528
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_aesdeclast (MN_vaesdeclast + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vaesdeclast 0x4530
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_aesenclast (MN_vaesenclast + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vaesenclast 0x453c
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_test (MN_ptest + 1)
|
|
|
|
#define MN_ptest (MN_vptest + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vptest 0x4548
|
|
|
|
#define MN_xtest 0x454f
|
|
|
|
#define MN_fst 0x4555
|
|
|
|
#define MN_fist 0x4559
|
|
|
|
#define MN_rdmsrlist 0x455e
|
|
|
|
#define MN_wrmsrlist 0x4568
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_aeskeygenassist (MN_vaeskeygenassist + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vaeskeygenassist 0x4572
|
|
|
|
#define MN_vmptrst 0x4583
|
|
|
|
#define MN_ftst 0x458b
|
|
|
|
#define MN_rmpadjust 0x4590
|
|
|
|
#define MN_ctestt 0x459a
|
|
|
|
#define MN_out 0x45a1
|
|
|
|
#define MN_pext 0x45a5
|
|
|
|
#define MN_bndcu 0x45aa
|
|
|
|
#define MN_enclu 0x45b0
|
|
|
|
#define MN_fcmovnu 0x45b6
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_lddqu (MN_vlddqu + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vlddqu 0x45be
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_movdqu (MN_maskmovdqu + 4)
|
|
|
|
#define MN_maskmovdqu (MN_vmaskmovdqu + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmaskmovdqu 0x45c5
|
|
|
|
#define MN_vmovdqu 0x45d1
|
|
|
|
#define MN_rdpkru 0x45d9
|
|
|
|
#define MN_wrpkru 0x45e0
|
|
|
|
#define MN_rdpru 0x45e7
|
|
|
|
#define MN_eretu 0x45ed
|
|
|
|
#define MN_fcmovu 0x45f3
|
|
|
|
#define MN_imulzu 0x45fa
|
|
|
|
#define MN_xgetbv 0x4601
|
|
|
|
#define MN_xsetbv 0x4608
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_div (MN_fdiv + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_fdiv 0x460f
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_idiv (MN_fidiv + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_fidiv 0x4614
|
|
|
|
#define MN_enclv 0x461a
|
|
|
|
#define MN_fldenv 0x4620
|
|
|
|
#define MN_fstenv 0x4627
|
|
|
|
#define MN_fnstenv 0x462e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_mov (MN_vpcmov + 3)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpcmov 0x4636
|
|
|
|
#define MN_bndmov 0x463d
|
|
|
|
#define MN_smov 0x4644
|
|
|
|
#define MN_rex_w 0x4649
|
|
|
|
#define MN_vcvttph2w 0x464f
|
|
|
|
#define MN_vcvtph2w 0x4659
|
|
|
|
#define MN_vpermi2w 0x4662
|
|
|
|
#define MN_vpmovm2w 0x466b
|
|
|
|
#define MN_vpermt2w 0x4674
|
|
|
|
#define MN_vpshaw 0x467d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psraw (MN_vpsraw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsraw 0x4684
|
|
|
|
#define MN_vphsubbw 0x468b
|
|
|
|
#define MN_cbw 0x4694
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psadbw (MN_vdbpsadbw + 3)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vdbpsadbw 0x4698
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_mpsadbw (MN_vmpsadbw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vmpsadbw 0x46a2
|
|
|
|
#define MN_vpsadbw 0x46ab
|
|
|
|
#define MN_vphaddbw 0x46b3
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_punpckhbw (MN_vpunpckhbw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpunpckhbw 0x46bc
|
|
|
|
#define MN_kunpckbw 0x46c7
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_punpcklbw (MN_vpunpcklbw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpunpcklbw 0x46d0
|
|
|
|
#define MN_vphaddubw 0x46db
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_phsubw (MN_vphsubw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vphsubw 0x46e5
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psubw (MN_vpsubw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsubw 0x46ed
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmovsxbw (MN_vpmovsxbw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmovsxbw 0x46f4
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmovzxbw (MN_vpmovzxbw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmovzxbw 0x46fe
|
|
|
|
#define MN_fldcw 0x4708
|
|
|
|
#define MN_fstcw 0x470e
|
|
|
|
#define MN_fnstcw 0x4714
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_phaddw (MN_vphaddw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vphaddw 0x471b
|
|
|
|
#define MN_kaddw 0x4723
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_paddw (MN_vpaddw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpaddw 0x4729
|
|
|
|
#define MN_vpshldw 0x4730
|
|
|
|
#define MN_kandw 0x4738
|
|
|
|
#define MN_vpexpandw 0x473e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pblendw (MN_vpblendw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpblendw 0x4748
|
|
|
|
#define MN_vpshrdw 0x4751
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_packssdw (MN_vpackssdw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpackssdw 0x4759
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_packusdw (MN_vpackusdw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpackusdw 0x4763
|
|
|
|
#define MN_vpmovusdw 0x476d
|
|
|
|
#define MN_vpmovsdw 0x4777
|
|
|
|
#define MN_vpmovdw 0x4780
|
|
|
|
#define MN_vpcomgew 0x4788
|
|
|
|
#define MN_vpcomlew 0x4791
|
|
|
|
#define MN_vpcmpnlew 0x479a
|
|
|
|
#define MN_vpcmplew 0x47a4
|
|
|
|
#define MN_vpcomfalsew 0x47ad
|
|
|
|
#define MN_vpcomtruew 0x47b9
|
|
|
|
#define MN_pi2fw 0x47c4
|
|
|
|
#define MN_pshufw 0x47ca
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pavgw (MN_vpavgw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpavgw 0x47d1
|
|
|
|
#define MN_prefetchw 0x47d8
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pshufhw (MN_vpshufhw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpshufhw 0x47e2
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmulhw (MN_vpmulhw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmulhw 0x47eb
|
|
|
|
#define MN_pf2iw 0x47f3
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pshuflw (MN_vpshuflw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpshuflw 0x47f9
|
|
|
|
#define MN_vpshlw 0x4802
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psllw (MN_vpsllw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsllw 0x4809
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmullw (MN_vpmullw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmullw 0x4810
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psrlw (MN_vpsrlw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsrlw 0x4818
|
|
|
|
#define MN_kshiftlw 0x481f
|
|
|
|
#define MN_vpblendmw 0x4828
|
|
|
|
#define MN_vptestnmw 0x4832
|
|
|
|
#define MN_vpcomw 0x483c
|
|
|
|
#define MN_vpermw 0x4843
|
|
|
|
#define MN_vptestmw 0x484a
|
|
|
|
#define MN_kandnw 0x4853
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psignw (MN_vpsignw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsignw 0x485a
|
|
|
|
#define MN_vpcmpw 0x4862
|
|
|
|
#define MN_vpcomeqw 0x4869
|
|
|
|
#define MN_vpcomneqw 0x4872
|
|
|
|
#define MN_vpcmpneqw 0x487c
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pcmpeqw (MN_vpcmpeqw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpcmpeqw 0x4886
|
|
|
|
#define MN_vpmovusqw 0x488f
|
|
|
|
#define MN_vpmovsqw 0x4899
|
|
|
|
#define MN_vpmovqw 0x48a2
|
|
|
|
#define MN_verw 0x48aa
|
|
|
|
#define MN_pmulhrw 0x48af
|
|
|
|
#define MN_korw 0x48b7
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|
|
#define MN_kxnorw 0x48bc
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|
|
#define MN_kxorw 0x48c3
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pinsrw (MN_vpinsrw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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|
|
#define MN_vpinsrw 0x48c9
|
|
|
|
#define MN_kshiftrw 0x48d1
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pextrw (MN_vpextrw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpextrw 0x48da
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pabsw (MN_vpabsw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpabsw 0x48e2
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmaddubsw (MN_vpmaddubsw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmaddubsw 0x48e9
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_phsubsw (MN_vphsubsw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vphsubsw 0x48f4
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psubsw (MN_vpsubsw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsubsw 0x48fd
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_phaddsw (MN_vphaddsw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vphaddsw 0x4905
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_paddsw (MN_vpaddsw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpaddsw 0x490e
|
|
|
|
#define MN_lmsw 0x4916
|
|
|
|
#define MN_smsw 0x491b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pminsw (MN_vpminsw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpminsw 0x4920
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmulhrsw (MN_vpmulhrsw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmulhrsw 0x4928
|
|
|
|
#define MN_vpcompressw 0x4932
|
|
|
|
#define MN_fstsw 0x493e
|
|
|
|
#define MN_fnstsw 0x4944
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_psubusw (MN_vpsubusw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpsubusw 0x494b
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_paddusw (MN_vpaddusw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpaddusw 0x4954
|
|
|
|
#define MN_movsw 0x495d
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmaxsw (MN_vpmaxsw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmaxsw 0x4963
|
|
|
|
#define MN_cbtw 0x496b
|
|
|
|
#define MN_vpcomgtw 0x4970
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pcmpgtw (MN_vpcmpgtw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpcmpgtw 0x4979
|
|
|
|
#define MN_vpcomltw 0x4982
|
|
|
|
#define MN_vpcmpnltw 0x498b
|
|
|
|
#define MN_vpcmpltw 0x4995
|
|
|
|
#define MN_vpopcntw 0x499e
|
|
|
|
#define MN_knotw 0x49a7
|
|
|
|
#define MN_vprotw 0x49ad
|
|
|
|
#define MN_vpbroadcastw 0x49b4
|
|
|
|
#define MN_ktestw 0x49c1
|
|
|
|
#define MN_kortestw 0x49c8
|
|
|
|
#define MN_vcvttph2uw 0x49d1
|
|
|
|
#define MN_vcvtph2uw 0x49dc
|
|
|
|
#define MN_vpcomgeuw 0x49e6
|
|
|
|
#define MN_vpcomleuw 0x49f0
|
|
|
|
#define MN_vpcmpnleuw 0x49fa
|
|
|
|
#define MN_vpcmpleuw 0x4a05
|
|
|
|
#define MN_vpcomfalseuw 0x4a0f
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|
|
|
#define MN_vpcomtrueuw 0x4a1c
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmulhuw (MN_vpmulhuw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpmulhuw 0x4a28
|
|
|
|
#define MN_vpcomuw 0x4a31
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pminuw (MN_vpminuw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vpminuw 0x4a39
|
|
|
|
#define MN_vpcmpuw 0x4a41
|
|
|
|
#define MN_vpcomequw 0x4a49
|
|
|
|
#define MN_vpcomnequw 0x4a53
|
|
|
|
#define MN_vpcmpnequw 0x4a5e
|
|
|
|
#define MN_vpcmpequw 0x4a69
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_phminposuw (MN_vphminposuw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
|
|
|
#define MN_vphminposuw 0x4a73
|
|
|
|
#define MN_vpcomgtuw 0x4a7f
|
|
|
|
#define MN_vpcomltuw 0x4a89
|
|
|
|
#define MN_vpcmpnltuw 0x4a93
|
|
|
|
#define MN_vpcmpltuw 0x4a9e
|
2023-01-20 10:16:17 +01:00
|
|
|
#define MN_pmaxuw (MN_vpmaxuw + 1)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_vpmaxuw 0x4aa8
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#define MN_vpsravw 0x4ab0
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#define MN_vpshldvw 0x4ab8
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#define MN_vpshrdvw 0x4ac1
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#define MN_vpsllvw 0x4aca
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#define MN_vpsrlvw 0x4ad2
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#define MN_kmovw 0x4ada
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#define MN_vmovw 0x4ae0
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#define MN_vpmacsww 0x4ae6
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#define MN_vpmacssww 0x4aef
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#define MN_movzw 0x4af9
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#define MN_rex_x 0x4aff
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#define MN_fyl2x 0x4b05
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#define MN_rex64x 0x4b0b
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#define MN_vcvtneps2bf16x 0x4b12
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#define MN_vfpclasspbf16x 0x4b21
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#define MN_vcvtneph2bf8x 0x4b30
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#define MN_vcvtneph2hf8x 0x4b3e
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#define MN_pfmax 0x4b4c
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#define MN_adcx 0x4b52
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#define MN_bndldx 0x4b57
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#define MN_vfpclasspdx 0x4b5e
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#define MN_fclex 0x4b6a
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#define MN_fnclex 0x4b70
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#define MN_rex 0x4b77
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#define MN_vcvtpd2phx 0x4b7b
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#define MN_vcvtdq2phx 0x4b86
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#define MN_vcvtudq2phx 0x4b91
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#define MN_vcvtqq2phx 0x4b9d
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#define MN_vcvtuqq2phx 0x4ba8
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#define MN_vcvt2ps2phx 0x4bb4
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#define MN_vcvtps2phx 0x4bc0
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#define MN_vfpclassphx 0x4bcb
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#define MN_shlx 0x4bd7
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#define MN_mulx 0x4bdc
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#define MN_adox 0x4be1
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#define MN_vcvttpd2dqx 0x4be6
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#define MN_vcvtpd2dqx 0x4bf2
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#define MN_vcvttpd2udqx 0x4bfd
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#define MN_vcvtpd2udqx 0x4c0a
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#define MN_rex_rx 0x4c16
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#define MN_sarx 0x4c1d
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#define MN_shrx 0x4c22
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#define MN_rorx 0x4c27
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#define MN_monitorx 0x4c2c
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#define MN_rex_wrx 0x4c35
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#define MN_vcvtneph2bf8sx 0x4c3d
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#define MN_vcvtneph2hf8sx 0x4c4c
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#define MN_vcvtpd2psx 0x4c5b
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#define MN_vcvtph2psx 0x4c66
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#define MN_vcvtqq2psx 0x4c71
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#define MN_vcvtuqq2psx 0x4c7c
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#define MN_vfpclasspsx 0x4c88
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#define MN_vcvttpd2dqsx 0x4c94
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#define MN_vcvttpd2udqsx 0x4ca1
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#define MN_movsx 0x4caf
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#define MN_mwaitx 0x4cb5
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#define MN_bndstx 0x4cbc
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#define MN_rex_wx 0x4cc3
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#define MN_rexx 0x4cca
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#define MN_vcvtps2phxx 0x4ccf
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#define MN_movzx 0x4cdb
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#define MN_rex64y 0x4ce1
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#define MN_vcvtneps2bf16y 0x4ce8
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#define MN_vfpclasspbf16y 0x4cf7
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#define MN_vcvtneph2bf8y 0x4d06
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#define MN_vcvtneph2hf8y 0x4d14
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#define MN_vfpclasspdy 0x4d22
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#define MN_loadiwkey 0x4d2e
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#define MN_vcvtpd2phy 0x4d38
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#define MN_vcvtdq2phy 0x4d43
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#define MN_vcvtudq2phy 0x4d4e
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#define MN_vcvtqq2phy 0x4d5a
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#define MN_vcvtuqq2phy 0x4d65
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#define MN_vfpclassphy 0x4d71
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#define MN_vcvttpd2dqy 0x4d7d
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#define MN_vcvtpd2dqy 0x4d89
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#define MN_vcvttpd2udqy 0x4d94
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#define MN_vcvtpd2udqy 0x4da1
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#define MN_rmpquery 0x4dad
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#define MN_vcvtneph2bf8sy 0x4db6
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#define MN_vcvtneph2hf8sy 0x4dc5
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#define MN_clrssbsy 0x4dd4
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#define MN_setssbsy 0x4ddd
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#define MN_vcvtpd2psy 0x4de6
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#define MN_vcvtqq2psy 0x4df1
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#define MN_vcvtuqq2psy 0x4dfc
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#define MN_vfpclasspsy 0x4e08
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#define MN_vcvttpd2dqsy 0x4e14
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#define MN_vcvttpd2udqsy 0x4e21
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#define MN_rex64xy 0x4e2f
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#define MN_rexy 0x4e37
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#define MN_vcvtps2phxy 0x4e3c
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#define MN_rexxy 0x4e48
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#define MN_rex64z 0x4e4e
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#define MN_vfpclasspbf16z 0x4e55
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#define MN_fldz 0x4e64
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#define MN_vfpclasspdz 0x4e69
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#define MN_vcvtpd2phz 0x4e75
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#define MN_vcvtqq2phz 0x4e80
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#define MN_vcvtuqq2phz 0x4e8b
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#define MN_vfpclassphz 0x4e97
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#define MN_jz 0x4ea3
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#define MN_jnz 0x4ea6
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#define MN_repnz 0x4eaa
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#define MN_ccmpnz 0x4eb0
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#define MN_loopnz 0x4eb7
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#define MN_setnz 0x4ebe
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#define MN_ctestnz 0x4ec4
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#define MN_setzunz 0x4ecc
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2024-07-04 15:49:16 +08:00
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#define MN_cmovnz (MN_cfcmovnz + 2)
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Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_cfcmovnz 0x4ed4
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#define MN_repz 0x4edd
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#define MN_ccmpz 0x4ee2
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#define MN_loopz 0x4ee8
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#define MN_vfpclasspsz 0x4eee
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#define MN_setz 0x4efa
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#define MN_ctestz 0x4eff
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#define MN_setzuz 0x4f06
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2024-07-04 15:49:16 +08:00
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#define MN_cmovz (MN_cfcmovz + 2)
|
Support Intel AMX-TRANSPOSE
In this patch, we will support AMX-TRANSPOSE. Since AMX-TRANSPOSE
will be used with other CPUIDs very often, we put it into
CPU_FLAGS_COMMON.
To implement TMM pair, we reused ImplicitGroup and adjust the condition
in process_operands for the instructions.
APX_F extension is also handled in this patch, where it extends
T2RPNTLVW[Z0,Z1][,T1] to EVEX.128.NP/66.0F38.W0 6E/6F !(11):rrr:100
with NF=0.
Also, TTDPFP16PS should base on AMX_FP16, not AMX_BF16 in ISE055.
It would be fixed in ISE056.
gas/ChangeLog:
* config/tc-i386.c (cpu_arch): Add amx_transpose.
(_is_cpu): Ditto.
(process_operands): Adjust the condition for AMX-TRANSPOSE.
* doc/c-i386.texi: Document .amx_transpose.
* testsuite/gas/i386/x86-64.exp: Run AMX-TRANSPOSE tests.
* testsuite/gas/i386/x86-64-amx-transpose-bad.d: New test.
* testsuite/gas/i386/x86-64-amx-transpose-bad.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-intel.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.l: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose-inval.s: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.d: Ditto.
* testsuite/gas/i386/x86-64-amx-transpose.s: Ditto.
opcodes/ChangeLog:
* i386-dis.c (MOD_VEX_0F386E_X86_64_W_0): New.
(MOD_VEX_0F386F_X86_64_W_0): Ditto.
(PREFIX_VEX_0F385F_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386B_X86_64_W_0_L_0): Ditto.
(PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0): Ditto.
(PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0): Ditto.
(X86_64_VEX_0F385F): Ditto.
(X86_64_VEX_0F386B): Ditto.
(X86_64_VEX_0F386E): Ditto.
(X86_64_VEX_0F386F): Ditto.
(VEX_LEN_0F385F_X86_64_W_0): Ditto.
(VEX_LEN_0F386B_X86_64_W_0): Ditto.
(VEX_LEN_0F386E_X86_64_W_0_M_0): Ditto.
(VEX_LEN_0F386F_X86_64_W_0_M_0): Ditto.
(VEX_W_0F385F_X86_64): Ditto.
(VEX_W_0F386B_X86_64): Ditto.
(VEX_W_0F386E_X86_64): Ditto.
(VEX_W_0F386F_X86_64): Ditto.
(mod_table): Add MOD_VEX_0F386E_X86_64_W_0,
MOD_VEX_0F386F_X86_64_W_0.
(prefix_table): Add PREFIX_VEX_0F386E_X86_64_W_0_M_0_L_0,
PREFIX_VEX_0F386F_X86_64_W_0_M_0_L_0.
Add new instructions for PREFIX_VEX_0F386C_X86_64_W_0_L_0.
(x86_64_table): Add X86_64_VEX_0F385F, X86_64_VEX_0F386B,
X86_64_VEX_0F386E, X86_64_VEX_0F386F.
(vex_len_table): Add VEX_LEN_0F385F_X86_64_W_0,
VEX_LEN_0F386B_X86_64_W_0, VEX_LEN_0F386E_X86_64_W_0_M_0,
VEX_LEN_0F386F_X86_64_W_0_M_0.
(vex_w_table): Add VEX_W_0F385F_X86_64, VEX_W_0F386B_X86_64,
VEX_W_0F386E_X86_64, VEX_W_0F386F_X86_64.
* i386-gen.c (cpu_flag_init): Add AMX_TRANSPOSE.
(cpu_flags): Add CpuAMX_TRANSPOSE.
* i386-init.h: Regenerated.
* i386-mnem.h: Ditto.
* i386-opc.h (CpuAMX_TRANSPOSE): New.
(i386_cpu): Add cpuamx_transpose.
* i386-opc.tbl: Add AMX-TRANSPOSE instructions.
* i386-tbl.h: Regenerated.
Co-authored-by: Hu, Lin1 <lin1.hu@intel.com>
2025-01-02 10:14:37 +08:00
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#define MN_cfcmovz 0x4f0d
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#define MN_rex64xz 0x4f15
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#define MN_jecxz 0x4f1d
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#define MN_jcxz 0x4f23
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#define MN_jrcxz 0x4f28
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#define MN_rexz 0x4f2e
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#define MN_rexxz 0x4f33
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#define MN_rex64yz 0x4f39
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#define MN_rex64xyz 0x4f41
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#define MN_rexyz 0x4f4a
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#define MN_rexxyz 0x4f50
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#define MN__disp32_ 0x4f57
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#define MN__rex2_ 0x4f60
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#define MN__vex2_ 0x4f67
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#define MN__vex3_ 0x4f6e
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#define MN__disp16_ 0x4f75
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#define MN__disp8_ 0x4f7e
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#define MN__load_ 0x4f86
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#define MN__store_ 0x4f8d
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#define MN__nooptimize_ 0x4f95
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#define MN__nf_ 0x4fa2
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#define MN__rex_ 0x4fa7
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#define MN__evex_ 0x4fad
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#define MN__vex_ 0x4fb4
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#define MN__insn 0x4fba
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