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114 lines
2.0 KiB
ArmAsm
114 lines
2.0 KiB
ArmAsm
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//Original:/testcases/core/c_ldimmhalf_lzhi_dr/c_ldimmhalf_lzhi_dr.dsp
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// Spec Reference: ldimmhalf lz & hi dreg
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# mach: bfin
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.include "testutils.inc"
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start
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INIT_R_REGS -1;
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// test Dreg
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R0 = 0x0001 (Z);
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R0.H = 0x0000;
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R1 = 0x0003 (Z);
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R1.H = 0x0002;
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R2 = 0x0005 (Z);
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R2.H = 0x0004;
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R3 = 0x0007 (Z);
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R3.H = 0x0006;
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R4 = 0x0009 (Z);
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R4.H = 0x0008;
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R5 = 0x000b (Z);
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R5.H = 0x000a;
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R6 = 0x000d (Z);
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R6.H = 0x000c;
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R7 = 0x000f (Z);
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R7.H = 0x000e;
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CHECKREG r0, 0x00000001;
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CHECKREG r1, 0x00020003;
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CHECKREG r2, 0x00040005;
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CHECKREG r3, 0x00060007;
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CHECKREG r4, 0x00080009;
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CHECKREG r5, 0x000a000b;
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CHECKREG r6, 0x000c000d;
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CHECKREG r7, 0x000e000f;
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R0 = 0x0010 (Z);
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R0.H = 0x0000;
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R1 = 0x0030 (Z);
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R1.H = 0x0020;
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R2 = 0x0050 (Z);
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R2.H = 0x0040;
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R3 = 0x0070 (Z);
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R3.H = 0x0060;
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R4 = 0x0090 (Z);
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R4.H = 0x0080;
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R5 = 0x00b0 (Z);
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R5.H = 0x00a0;
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R6 = 0x00d0 (Z);
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R6.H = 0x00c0;
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R7 = 0x00f0 (Z);
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R7.H = 0x00e0;
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CHECKREG r0, 0x00000010;
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CHECKREG r1, 0x00200030;
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CHECKREG r2, 0x00400050;
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CHECKREG r3, 0x00600070;
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CHECKREG r4, 0x00800090;
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CHECKREG r5, 0x00a000b0;
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CHECKREG r6, 0x00c000d0;
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CHECKREG r7, 0x00e000f0;
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R0 = 0x0100 (Z);
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R0.H = 0x0000;
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R1 = 0x0300 (Z);
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R1.H = 0x0200;
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R2 = 0x0500 (Z);
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R2.H = 0x0400;
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R3 = 0x0700 (Z);
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R3.H = 0x0600;
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R4 = 0x0900 (Z);
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R4.H = 0x0800;
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R5 = 0x0b00 (Z);
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R5.H = 0x0a00;
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R6 = 0x0d00 (Z);
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R6.H = 0x0c00;
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R7 = 0x0f00 (Z);
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R7.H = 0x0e00;
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CHECKREG r0, 0x00000100;
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CHECKREG r1, 0x02000300;
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CHECKREG r2, 0x04000500;
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CHECKREG r3, 0x06000700;
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CHECKREG r4, 0x08000900;
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CHECKREG r5, 0x0a000b00;
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CHECKREG r6, 0x0c000d00;
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CHECKREG r7, 0x0e000f00;
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R0 = 0x1000 (Z);
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R0.H = 0x0000;
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R1 = 0x3000 (Z);
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R1.H = 0x2000;
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R2 = 0x5000 (Z);
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R2.H = 0x4000;
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R3 = 0x7000 (Z);
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R3.H = 0x6000;
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R4 = 0x9000 (Z);
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R4.H = 0x8000;
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R5 = 0xb000 (Z);
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R5.H = 0xa000;
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R6 = 0xd000 (Z);
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R6.H = 0xc000;
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R7 = 0xf000 (Z);
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R7.H = 0xe000;
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CHECKREG r0, 0x00001000;
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CHECKREG r1, 0x20003000;
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CHECKREG r2, 0x40005000;
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CHECKREG r3, 0x60007000;
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CHECKREG r4, 0x80009000;
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CHECKREG r5, 0xa000b000;
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CHECKREG r6, 0xc000d000;
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CHECKREG r7, 0xe000f000;
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pass
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