binutils-gdb/ld/testsuite/ld-tic6x/mvk-reloc-global.d

#name: C6X MVK relocations, global symbols
#as: -mlittle-endian
#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s0=0 --defsym s7fff=0x7fff --defsym s80000000=0x80000000 --defsym sffff8000=0xffff8000 --defsym sffffffff=0xffffffff
#source: mvk-reloc-global.s
#objdump: -dr

.*: *file format elf32-tic6x-le


Disassembly of section \.text:

10000000 <[^>]*>:
10000000:[ \t]+00800028[ \t]+mvk \.S1 0,a1
10000004:[ \t]+00c00068[ \t]+mvkh \.S1 2147483648,a1
10000008:[ \t]+00ffffa8[ \t]+mvk \.S1 -1,a1
1000000c:[ \t]+00ffffe8[ \t]+mvkh \.S1 4294901760,a1
10000010:[ \t]+00800028[ \t]+mvk \.S1 0,a1
10000014:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
10000018:[ \t]+00ffff28[ \t]+mvk \.S1 -2,a1
1000001c:[ \t]+00ffffe8[ \t]+mvkh \.S1 4294901760,a1
10000020:[ \t]+00800028[ \t]+mvk \.S1 0,a1
10000024:[ \t]+00800068[ \t]+mvkh \.S1 0,a1
10000028:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1
1000002c:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1
10000030:[ \t]+00bfffa8[ \t]+mvk \.S1 32767,a1
[ \t]*\.\.\.
bfd: * Makefile.am (ALL_MACHINES): Add cpu-tic6x.lo. (ALL_MACHINES_CFILES): Add cpu-tic6x.c. (BFD32_BACKENDS): Add elf32-tic6x.lo. (BFD32_BACKENDS_CFILES): Add elf32-tic6x.c. * Makefile.in: Regenerate. * archures.c (bfd_arch_tic6x, bfd_tic6x_arch): New. (bfd_archures_list): Update. * config.bfd (tic6x--elf): New. configure.in (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. * configure: Regenerate. * cpu-tic6x.c, elf32-tic6x.c: New. * reloc.c (BFD_RELOC_C6000_PCR_S21, BFD_RELOC_C6000_PCR_S12, BFD_RELOC_C6000_PCR_S10, BFD_RELOC_C6000_PCR_S7, BFD_RELOC_C6000_ABS_S16, BFD_RELOC_C6000_ABS_L16, BFD_RELOC_C6000_ABS_H16, BFD_RELOC_C6000_SBR_U15_B, BFD_RELOC_C6000_SBR_U15_H, BFD_RELOC_C6000_SBR_U15_W, BFD_RELOC_C6000_SBR_S16, BFD_RELOC_C6000_SBR_L16_B, BFD_RELOC_C6000_SBR_L16_H, BFD_RELOC_C6000_SBR_L16_W, BFD_RELOC_C6000_SBR_H16_B, BFD_RELOC_C6000_SBR_H16_H, BFD_RELOC_C6000_SBR_H16_W, BFD_RELOC_C6000_SBR_GOT_U15_W, BFD_RELOC_C6000_SBR_GOT_L16_W, BFD_RELOC_C6000_SBR_GOT_H16_W, BFD_RELOC_C6000_DSBT_INDEX, BFD_RELOC_C6000_PREL31, BFD_RELOC_C6000_COPY, BFD_RELOC_C6000_ALIGN, BFD_RELOC_C6000_FPHEAD, BFD_RELOC_C6000_NOCMP): New. * targets.c (bfd_elf32_tic6x_be_vec, bfd_elf32_tic6x_le_vec): New. (_bfd_target_vector): Update. * bfd-in2.h, libbfd.h: Regenerate. binutils: * MAINTAINERS: Add self as TI C6X maintainer. * NEWS: Add news entry for TI C6X support. * readelf.c: Include elf/tic6x.h. (guess_is_rela): Handle EM_TI_C6000. (dump_relocations): Likewise. (get_tic6x_dynamic_type): New. (get_dynamic_type): Call it. (get_machine_flags): Handle EF_C6000_REL. (get_osabi_name): Handle machine-specific values only for relevant machines. Handle C6X values. (get_tic6x_segment_type): New. (get_segment_type): Call it. (get_tic6x_section_type_name): New. (get_section_type_name): Call it. (is_32bit_abs_reloc, is_16bit_abs_reloc, is_none_reloc): Handle EM_TI_C6000. gas: * Makefile.am (TARGET_CPU_CFILES): Add config/tc-tic6x.c. (TARGET_CPU_HFILES): Add config/tc-tic6x.h. * Makefile.in: Regenerate. * NEWS: Add news entry for TI C6X support. * app.c (do_scrub_chars): Handle "\|\|^" for TI C6X. Handle TC_PREDICATE_START_CHAR and TC_PREDICATE_END_CHAR. Keep spaces in operands if TC_KEEP_OPERAND_SPACES. * configure.tgt (tic6x--): New. * config/tc-ia64.h (TC_PREDICATE_START_CHAR, TC_PREDICATE_END_CHAR): Define. * config/tc-tic6x.c, config/tc-tic6x.h: New. * doc/Makefile.am (CPU_DOCS): Add c-tic6x.texi. * doc/Makefile.in: Regenerate. * doc/all.texi (TIC6X): Define. * doc/as.texinfo: Add TI C6X documentation. Include c-tic6x.texi. * doc/c-tic6x.texi: New. gas/testsuite: * gas/tic6x: New directory and testcases. include: * dis-asm.h (print_insn_tic6x): Declare. include/elf: * common.h (ELFOSABI_C6000_ELFABI, ELFOSABI_C6000_LINUX): Define. * tic6x.h: New. include/opcode: * tic6x-control-registers.h, tic6x-insn-formats.h, tic6x-opcode-table.h, tic6x.h: New. ld: * Makefile.am (ALL_EMULATIONS): Add eelf32_tic6x_be.o and eelf32_tic6x_le.o. (eelf32_tic6x_be.c, eelf32_tic6x_le.c): New. * NEWS: Add news entry for TI C6X support. * configure.tgt (tic6x--): New. * emulparams/elf32_tic6x_be.sh, emulparams/elf32_tic6x_le.sh: New. ld/testsuite: * ld-elf/flags1.d, ld-elf/merge.d: XFAIL for tic6x--. * ld-elf/sec-to-seg.exp: Set B_test_same_seg to 0 for tic6x--. * ld-tic6x: New directory and testcases. opcodes: * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. * Makefile.in: Regenerate. * configure.in (bfd_tic6x_arch): New. * configure: Regenerate. * disassemble.c (ARCH_tic6x): Define if ARCH_all. (disassembler): Handle TI C6X. * tic6x-dis.c: New. 2010-03-26 05:12:36 +08:00			`#name: C6X MVK relocations, global symbols`
			`#as: -mlittle-endian`
			`#ld: -melf32_tic6x_le -Tgeneric.ld --defsym s0=0 --defsym s7fff=0x7fff --defsym s80000000=0x80000000 --defsym sffff8000=0xffff8000 --defsym sffffffff=0xffffffff`
			`#source: mvk-reloc-global.s`
			`#objdump: -dr`

			`.: file format elf32-tic6x-le`


			`Disassembly of section \.text:`

			`10000000 <[^>]*>:`
			`10000000:[ \t]+00800028[ \t]+mvk \.S1 0,a1`
			`10000004:[ \t]+00c00068[ \t]+mvkh \.S1 2147483648,a1`
			`10000008:[ \t]+00ffffa8[ \t]+mvk \.S1 -1,a1`
			`1000000c:[ \t]+00ffffe8[ \t]+mvkh \.S1 4294901760,a1`
			`10000010:[ \t]+00800028[ \t]+mvk \.S1 0,a1`
			`10000014:[ \t]+00800068[ \t]+mvkh \.S1 0,a1`
			`10000018:[ \t]+00ffff28[ \t]+mvk \.S1 -2,a1`
			`1000001c:[ \t]+00ffffe8[ \t]+mvkh \.S1 4294901760,a1`
			`10000020:[ \t]+00800028[ \t]+mvk \.S1 0,a1`
			`10000024:[ \t]+00800068[ \t]+mvkh \.S1 0,a1`
			`10000028:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1`
			`1000002c:[ \t]+00c00028[ \t]+mvk \.S1 -32768,a1`
			`10000030:[ \t]+00bfffa8[ \t]+mvk \.S1 32767,a1`
			`[ \t]*\.\.\.`