2013-10-29 14:10:34 +08:00
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#source: elfv2.s
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#as: -a64
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#ld: -melf64ppc --defsym f2=0x1234 --defsym f3=0x10008888 --defsym f4=0x1200000 --defsym _start=f1
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#objdump: -dr
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.*
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Disassembly of section \.text:
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0+100000c0 <.*\.plt_branch\.f2>:
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Support fusion for ELFv2 stubs
Power8 fuses addis,addi and addis,ld sequences when the target of the
addis is the same as the addi/ld. Thus
addis r12,r2,xxx@ha
addi r12,r12,xxx@l / ld r12,xxx@l(r12)
is faster than
addis r11,r2,xxx@ha
addi r12,r11,xxx@l / ld r12,xxx@l(r11)
So use the form that allows fusion in plt call and branch stubs.
bfd/
* elf64-ppc.c (ADDIS_R12_R2): Define.
(build_plt_stub): Support fusion on ELFv2 stub.
(ppc_build_one_stub): Likewise for plt branch stubs.
gold/
* powerpc.cc (addis_12_2): Define.
(Stub_table::do_write): Support fusion on ELFv2 stubs.
ld/testsuite/
* ld-powerpc/elfv2exe.d: Update for changed plt call stubs.
gdb/
* ppc64-tdep.c (ppc64_standard_linkage8): New.
(ppc64_skip_trampoline_code): Recognise ELFv2 stub supporting fusion.
2014-06-03 09:25:29 +08:00
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.*: (ff ff 82 3d|3d 82 ff ff) addis r12,r2,-1
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.*: (f0 7f 8c e9|e9 8c 7f f0) ld r12,32752\(r12\)
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2013-10-29 14:10:34 +08:00
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.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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.*: (20 04 80 4e|4e 80 04 20) bctr
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0+100000d0 <.*\.plt_branch\.f4>:
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Support fusion for ELFv2 stubs
Power8 fuses addis,addi and addis,ld sequences when the target of the
addis is the same as the addi/ld. Thus
addis r12,r2,xxx@ha
addi r12,r12,xxx@l / ld r12,xxx@l(r12)
is faster than
addis r11,r2,xxx@ha
addi r12,r11,xxx@l / ld r12,xxx@l(r11)
So use the form that allows fusion in plt call and branch stubs.
bfd/
* elf64-ppc.c (ADDIS_R12_R2): Define.
(build_plt_stub): Support fusion on ELFv2 stub.
(ppc_build_one_stub): Likewise for plt branch stubs.
gold/
* powerpc.cc (addis_12_2): Define.
(Stub_table::do_write): Support fusion on ELFv2 stubs.
ld/testsuite/
* ld-powerpc/elfv2exe.d: Update for changed plt call stubs.
gdb/
* ppc64-tdep.c (ppc64_standard_linkage8): New.
(ppc64_skip_trampoline_code): Recognise ELFv2 stub supporting fusion.
2014-06-03 09:25:29 +08:00
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.*: (ff ff 82 3d|3d 82 ff ff) addis r12,r2,-1
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.*: (f8 7f 8c e9|e9 8c 7f f8) ld r12,32760\(r12\)
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2013-10-29 14:10:34 +08:00
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.*: (a6 03 89 7d|7d 89 03 a6) mtctr r12
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.*: (20 04 80 4e|4e 80 04 20) bctr
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0+100000e0 <_start>:
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2013-11-01 16:55:56 +08:00
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.*: (02 10 40 3c|3c 40 10 02) lis r2,4098
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Reorder more powerpc64 sections for -z relro
This moves .got too, which requires .sdata and .sbss to move with it,
because these sections share addressing via the toc pointer and with
small-model code must be within a 16-bit signed offset. .plt, .iplt
and .branch_lt must also be moved since they are addressed via a
32-bit offset from the toc pointer, and we might have a very large
.data section.
This change means we may have some bss style sections before the data
segment, necessitating another PT_LOAD header. Also, since _edata is
defined at the end of the data segment it's possible with an empty
.data to have _edata at the end of .plt which looks a little unusual
since .plt is a bss style section. That should only happen rarely in
real world binaries, but does occur in the ld testsuite.
ld/
* emulparams/elf64ppc.sh (BSS_PLT): Don't define.
(OTHER_READWRITE_SECTIONS): Move .branch_lt to..
(OTHER_RELRO_SECTIONS_2): ..here.
(DATA_GOT, SEPARATE_GOTPLT, DATA_SDATA, DATA_PLT,
PLT_BEFORE_GOT): Define.
* scripttempl/elf.sc: Handle DATA_SDATA and DATA_GOT/DATA_PLT/
PLT_BEFORE_GOT combination.
(DATA_GOT, SDATA_GOT): Don't define if either is already defined.
ld/testsuite/
* ld-powerpc/ambiguousv1.d,
* ld-powerpc/ambiguousv1b.d,
* ld-powerpc/ambiguousv2.d,
* ld-powerpc/ambiguousv2b.d,
* ld-powerpc/elfv2exe.d,
* ld-powerpc/elfv2so.d,
* ld-powerpc/tlsexe.r,
* ld-powerpc/tlsexetoc.r,
* ld-powerpc/tlsso.r,
* ld-powerpc/tlstocso.r: Update.
2015-01-20 14:49:15 +08:00
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.*: (38 81 42 38|38 42 81 38) addi r2,r2,-32456
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2013-10-29 14:10:34 +08:00
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.*: (a6 02 08 7c|7c 08 02 a6) mflr r0
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.*: (e1 ff 21 f8|f8 21 ff e1) stdu r1,-32\(r1\)
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.*: (30 00 01 f8|f8 01 00 30) std r0,48\(r1\)
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.*: (f5 ff ff 4b|4b ff ff f5) bl .* <_start\+0x8>
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.*: (08 80 62 e8|e8 62 80 08) ld r3,-32760\(r2\)
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.*: (c5 ff ff 4b|4b ff ff c5) bl .*\.plt_branch\.f2>
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.*: (00 00 00 60|60 00 00 00) nop
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.*: (10 80 62 e8|e8 62 80 10) ld r3,-32752\(r2\)
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.*: (81 87 00 48|48 00 87 81) bl 10008888 <f3>
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.*: (00 00 00 60|60 00 00 00) nop
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.*: (c1 ff ff 4b|4b ff ff c1) bl .*\.plt_branch\.f4>
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.*: (00 00 00 60|60 00 00 00) nop
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.*: (30 00 01 e8|e8 01 00 30) ld r0,48\(r1\)
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.*: (20 00 21 38|38 21 00 20) addi r1,r1,32
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.*: (a6 03 08 7c|7c 08 03 a6) mtlr r0
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.*: (20 00 80 4e|4e 80 00 20) blr
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