2021-01-14 14:03:54 +08:00
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2021-01-14 Mike Frysinger <vapier@gentoo.org>
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* Makefile.am (bfin-lex-wrapper.@OBJEXT@): Delete $(NO_WERROR).
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* Makefile.in: Regenerated.
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2021-01-14 13:51:59 +08:00
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2021-01-14 Mike Frysinger <vapier@gentoo.org>
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* bfin-lex.l (YY_NO_INPUT, YY_NO_UNPUT): Define.
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(parse_int): Mark char_bag const.
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2021-01-13 21:42:11 +08:00
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2021-01-13 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/27178
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* config/tc-i386.c (lex_got::gotrel): Add need_GOT_symbol.
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Don't generate GOT_symbol for PLT relocations.
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* testsuite/gas/i386/i386.exp: Run PR gas/27178 tests.
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* testsuite/gas/i386/no-got.d: New file.
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* testsuite/gas/i386/no-got.s: Likewise.
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* testsuite/gas/i386/x86-64-no-got.d: Likewise.
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* testsuite/gas/i386/x86-64-no-got.s: Likewise.
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2021-01-13 16:43:23 +08:00
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2021-01-13 Alan Modra <amodra@gmail.com>
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* Makefile.in: Regenerate.
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* Makefile.in: Regenerate.
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2021-01-12 21:45:28 +08:00
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2021-01-12 H.J. Lu <hongjiu.lu@intel.com>
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PR binutils/26792
|
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* configure.ac: Use GNU_MAKE_JOBSERVER.
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* aclocal.m4: Regenerated.
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* configure: Likewise.
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2021-01-12 21:18:50 +08:00
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2021-01-12 Nick Clifton <nickc@redhat.com>
|
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* po/fr.po: Updated French translation.
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2021-01-12 08:29:31 +08:00
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2021-01-11 H.J. Lu <hongjiu.lu@intel.com>
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PR ld/27173
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* configure: Regenerated.
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2021-01-06 01:39:04 +08:00
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2021-10-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* NEWS: Remove CSRE.
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* config/tc-aarch64.c (parse_csr_operand): Delete.
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(parse_operands): Delete handling of
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AARCH64_OPND_CSRE_CSR.
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(aarch64_features): Remove csre.
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* doc/c-aarch64.texi: Remove CSRE.
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* testsuite/gas/aarch64/csre.d: Delete.
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* testsuite/gas/aarch64/csre-invalid.s: Likewise.
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* testsuite/gas/aarch64/csre-invalid.d: Likewise.
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* testsuite/gas/aarch64/csre_csr.s: Likewise.
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* testsuite/gas/aarch64/csre_csr.d: Likewise.
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* testsuite/gas/aarch64/csre_csr-invalid.s: Likewise.
|
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* testsuite/gas/aarch64/csre_csr-invalid.l: Likewise.
|
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* testsuite/gas/aarch64/csre_csr-invalid.d: Likewise.
|
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2021-01-11 20:55:33 +08:00
|
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|
2021-01-11 Nick Clifton <nickc@redhat.com>
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* po/uk.po: Updated Ukranian translation.
|
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2021-01-09 22:47:58 +08:00
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2021-01-09 H.J. Lu <hongjiu.lu@intel.com>
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* configure: Regenerated.
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2021-01-09 19:01:01 +08:00
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|
2021-01-09 Nick Clifton <nickc@redhat.com>
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* configure: Regenerate.
|
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* po/gas.pot: Regenerate.
|
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2021-01-09 18:40:28 +08:00
|
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|
2021-01-09 Nick Clifton <nickc@redhat.com>
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* 2.36 release branch crated.
|
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|
POWER10: Add Return-Oriented Programming instructions
POWER10 adds some return-oriented programming (ROP) instructions and
this patch adds support for them. You will notice that they are enabled
for POWER8 and later, not just POWER10 and later. This is on purpose.
This allows the instructions to be added to POWER8 binaries that can be
run on POWER8, POWER9 and POWER10 cpus. On POWER8 and POWER9, these
instructions just act as nop's.
opcodes/
* ppc-opc.c (insert_dw, (extract_dw): New functions.
(DW, (XRC_MASK): Define.
(powerpc_opcodes) <hashchk, hashchkp, hashst, haststp>: New mnemonics.
gas/
* testsuite/gas/ppc/rop-checks.d,
* testsuite/gas/ppc/rop-checks.l,
* testsuite/gas/ppc/rop-checks.s,
* testsuite/gas/ppc/rop.d,
* testsuite/gas/ppc/rop.s: New tests.
* testsuite/gas/ppc/ppc.exp: Run them.
2021-01-09 06:07:12 +08:00
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|
2021-01-08 Peter Bergner <bergner@linux.ibm.com>
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* testsuite/gas/ppc/rop-checks.d,
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* testsuite/gas/ppc/rop-checks.l,
|
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* testsuite/gas/ppc/rop-checks.s,
|
|
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|
|
* testsuite/gas/ppc/rop.d,
|
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|
|
* testsuite/gas/ppc/rop.s: New tests.
|
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|
|
* testsuite/gas/ppc/ppc.exp: Run them.
|
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|
2021-01-09 08:33:29 +08:00
|
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|
|
2021-01-09 Alan Modra <amodra@gmail.com>
|
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|
|
* configure: Regenerate.
|
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|
2021-01-08 00:47:36 +08:00
|
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|
2021-01-07 Samuel Thibault <samuel.thibault@gnu.org>
|
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* configure: Regenerate.
|
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|
2021-01-07 22:42:00 +08:00
|
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|
2021-01-07 H.J. Lu <hongjiu.lu@intel.com>
|
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|
|
|
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|
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|
|
|
PR 27109
|
|
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|
|
* read.c (s_reloc): Call symbol_mark_used_in_reloc on the
|
|
|
|
|
|
section symbol.
|
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|
|
* subsegs.c (subseg_set_rest): Set BSF_SECTION_SYM_USED if needed.
|
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|
* write.c (adjust_reloc_syms): Call symbol_mark_used_in_reloc
|
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|
on the section symbol.
|
|
|
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|
|
(set_symtab): Don't generate unused section symbols.
|
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|
|
(maybe_generate_build_notes): Call symbol_mark_used_in_reloc
|
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|
|
on the section symbol.
|
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|
|
* config/obj-elf.c (elf_adjust_symtab): Call
|
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|
symbol_mark_used_in_reloc on the group signature symbol.
|
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|
* testsuite/gas/cfi/cfi-label.d: Remove unused section symbols
|
|
|
|
|
|
from expected output.
|
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|
|
* testsuite/gas/elf/elf.exp (run_elf_list_test): Check
|
|
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|
|
is_elf_unused_section_symbols.
|
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|
|
|
|
* testsuite/gas/elf/section2.e: Updated.
|
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|
|
* testsuite/gas/elf/section2.e-unused: New file.
|
|
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|
|
* testsuite/gas/elf/symver.d: Remove unused section symbols.
|
|
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|
|
* testsuite/gas/i386/ilp32/elf/symver.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-size-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-size-3.d: Likewise.
|
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|
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|
|
* testsuite/gas/i386/ilp32/x86-64-size-5.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/ilp32/x86-64-unwind.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/size-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/size-3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/svr4.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-size-1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-size-3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-size-5.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/i386/x86-64-unwind.d: Likewise.
|
|
|
|
|
|
|
2021-01-07 15:53:25 +08:00
|
|
|
|
2021-01-07 Philipp Tomsich <prt@gnu.org>
|
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|
|
* config/tc-riscv.c (riscv_multi_subset_supports): Added
|
|
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|
|
|
INSN_CLASS_ZIHINTPAUSE.
|
|
|
|
|
|
* testsuite/gas/riscv/pause.d: New testcase. Adding coverage for
|
|
|
|
|
|
the pause hint instruction.
|
|
|
|
|
|
* testsuite/gas/riscv/pause.s: Likewise.
|
|
|
|
|
|
|
2020-12-15 23:11:03 +08:00
|
|
|
|
2021-01-07 Claire Xenia Wolf <claire@symbioticeda.com>
|
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|
|
|
|
Jim Wilson <jimw@sifive.com>
|
|
|
|
|
|
Andrew Waterman <andrew@sifive.com>
|
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|
|
|
|
Maxim Blinov <maxim.blinov@embecosm.com>
|
|
|
|
|
|
Kito Cheng <kito.cheng@sifive.com>
|
|
|
|
|
|
Nelson Chu <nelson.chu@sifive.com>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_multi_subset_supports): Handle INSN_CLASS_ZB*.
|
|
|
|
|
|
(riscv_get_default_ext_version): Do not check the default_isa_spec when
|
|
|
|
|
|
the version defined in the riscv_opcodes table is ISA_SPEC_CLASS_DRAFT.
|
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns-32.d: New testcase.
|
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns-64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/bitmanip-insns.s: Likewise.
|
|
|
|
|
|
|
2021-01-06 10:06:31 +08:00
|
|
|
|
2021-01-06 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/sparc/sparc.exp: Move 64-bit tests inside gas_64_check.
|
|
|
|
|
|
|
2021-01-06 09:23:33 +08:00
|
|
|
|
2021-01-06 Alan Modra <amodra@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
* testsuite/gas/macros/app1.d: xfail tic30.
|
|
|
|
|
|
* testsuite/gas/macros/app2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/macros/app3.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/macros/app4.d: Likewise.
|
|
|
|
|
|
|
2021-01-06 05:50:37 +08:00
|
|
|
|
2021-01-06 Marcus Comstedt <marcus@mc.pp.se>
|
|
|
|
|
|
|
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|
|
* doc/as.texi: Add -mlittle-endian and -mbig-endian to docs.
|
|
|
|
|
|
* doc/c-riscv.texi: Likewise.
|
|
|
|
|
|
|
2021-01-06 05:50:39 +08:00
|
|
|
|
2021-01-06 Marcus Comstedt <marcus@mc.pp.se>
|
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|
|
|
|
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|
|
* testsuite/gas/riscv/li32.d: Accept bigriscv in addition
|
|
|
|
|
|
to littleriscv.
|
|
|
|
|
|
* testsuite/gas/riscv/li64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/lla32.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/lla64.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-g2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-g2_p1.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-g2p0.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-i2p0.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-i2p0m2_a2f2.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-nse-with-version.d: Likewise.
|
|
|
|
|
|
* testsuite/gas/riscv/march-ok-two-nse.d: Likewise.
|
|
|
|
|
|
|
RISC-V: Implement support for big endian targets.
RISC-V instruction/code is always little endian, but data might be
big-endian. Therefore, we can not use the original bfd_get/bfd_put
to get/put the code for big endian targets. Add new riscv_get_insn
and riscv_put_insn to always get/put code as little endian can resolve
the problem. Just remember to update them once we have supported
the 48-bit/128-bit instructions in the future patches.
bfd/
* config.bfd: Added targets riscv64be*-*-*, riscv32be*-*-* and
riscvbe*-*-*. Also added riscv_elf[32|64]_be_vec.
* configure.ac: Handle riscv_elf[32|64]_be_vec.
* configure: Regenerate.
* elfnn-riscv.c: Include <limits.h> and define CHAR_BIT for
riscv_is_insn_reloc.
(riscv_get_insn): RISC-V instructions are always little endian, but
bfd_get may be used for big-endian, so add new riscv_get_insn to handle
the insturctions.
(riscv_put_insn): Likewsie.
(riscv_is_insn_reloc): Check if we are relocaing an instruction.
(perform_relocation): Call riscv_is_insn_reloc to decide if we should
use riscv_[get|put]_insn or bfd_[get|put].
(riscv_zero_pcrel_hi_reloc): Use riscv_[get|put]_insn, bfd_[get|put]l32
or bfd_[get|put]l16 for code.
(riscv_elf_relocate_section): Likewise.
(riscv_elf_finish_dynamic_symbol): Likewise.
(riscv_elf_finish_dynamic_sections): Likewise.
(_bfd_riscv_relax_call): Likewise.
(_bfd_riscv_relax_lui): Likewise.
(_bfd_riscv_relax_align): Likewise.
(_bfd_riscv_relax_pc): Likewise.
(riscv_elf_object_p): Handled for big endian.
(TARGET_BIG_SYM, TARGET_BIG_NAME): Defined.
* targets.c: Add riscv_elf[32|64]_be_vec.
(_bfd_target_vector): Likewise.
gas/
* config/tc-riscv.c (riscv_target_format): Add elf64-bigriscv and
elf32-bigriscv.
(install_insn): Always write instructions as little endian.
(riscv_make_nops): Likewise.
(md_convert_frag_branch): Likewise.
(md_number_to_chars): Write data in target endianness.
(options, md_longopts): Add -mbig-endian and -mlittle-endian options.
(md_parse_option): Handle the endian options.
* config/tc-riscv.h: Only define TARGET_BYTES_BIG_ENDIAN if not
already defined.
* configure.tgt: Added riscv64be*, riscv32be*, riscvbe*.
ld/
* configure.tgt: Added riscvbe-*-*, riscv32be*-*-*, riscv64be*-*-*,
riscv32be*-*-linux*, and riscv64be*-*-linux*.
* Makefile.am: Added eelf32briscv.c, eelf32briscv_ilp32f.c and
eelf32briscv_ilp32.c.
* Makefile.in: Regenerate.
* emulparams/elf32briscv.sh: Added.
* emulparams/elf32briscv_ilp32.sh: Likewise.
* emulparams/elf32briscv_ilp32f.sh: Likewise.
* emulparams/elf64briscv.sh: Likewise.
* emulparams/elf64briscv_lp64.sh: Likewise.
* emulparams/elf64briscv_lp64f.sh: Likewise.
2021-01-06 05:50:32 +08:00
|
|
|
|
2021-01-06 Marcus Comstedt <marcus@mc.pp.se>
|
|
|
|
|
|
|
|
|
|
|
|
* config/tc-riscv.c (riscv_target_format): Add elf64-bigriscv and
|
|
|
|
|
|
elf32-bigriscv.
|
|
|
|
|
|
(install_insn): Always write instructions as little endian.
|
|
|
|
|
|
(riscv_make_nops): Likewise.
|
|
|
|
|
|
(md_convert_frag_branch): Likewise.
|
|
|
|
|
|
(md_number_to_chars): Write data in target endianness.
|
|
|
|
|
|
(options, md_longopts): Add -mbig-endian and -mlittle-endian options.
|
|
|
|
|
|
(md_parse_option): Handle the endian options.
|
|
|
|
|
|
* config/tc-riscv.h: Only define TARGET_BYTES_BIG_ENDIAN if not
|
|
|
|
|
|
already defined.
|
|
|
|
|
|
* configure.tgt: Added riscv64be*, riscv32be*, riscvbe*.
|
|
|
|
|
|
|
2021-01-05 04:37:49 +08:00
|
|
|
|
2021-01-04 H.J. Lu <hongjiu.lu@intel.com>
|
|
|
|
|
|
|
|
|
|
|
|
PR ld/26256
|
|
|
|
|
|
* config/obj-elf.c (obj_elf_change_section): Also filter out
|
|
|
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SHF_LINK_ORDER.
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2021-01-04 08:46:21 +08:00
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2021-01-04 Alan Modra <amodra@gmail.com>
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PR 27102
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* symbols.c (S_SET_EXTERNAL): Revise section symbol warning
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message and register symbol error message.
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2021-01-04 06:23:37 +08:00
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2021-01-04 Alan Modra <amodra@gmail.com>
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PR 27101
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* read.c (s_align): Use a large enough type for "align" to hold
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the result of get_absolute_expression.
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2021-01-01 11:51:52 +08:00
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2021-01-01 Nicolas Boulenguez <nicolas@debian.org>
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* config/tc-i386.c: Correct comment spelling.
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* config/tc-riscv.c: Likewise.
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* config/tc-s390.c: Correct comment grammar.
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* doc/c-i386.texi: Correct spelling.
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* doc/c-s390.texi: Correct grammar.
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2021-01-01 06:58:58 +08:00
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2021-01-01 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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2021-01-01 07:47:36 +08:00
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2021-01-01 Hans-Peter Nilsson <hp@bitrange.com>
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* config/tc-mmix.h (md_single_noop_insn): Change to "swym 0".
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2021-01-01 06:47:13 +08:00
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For older changes see ChangeLog-2020
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2016-01-01 18:44:31 +08:00
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2021-01-01 06:47:13 +08:00
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Copyright (C) 2021 Free Software Foundation, Inc.
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2016-01-01 18:44:31 +08:00
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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