2005-03-03 09:29:54 +08:00
|
|
|
@c Copyright 1992, 1993, 1994, 1996, 1997, 1999, 2000, 2001, 2002,
|
|
|
|
|
@c 2003, 2005
|
2001-03-09 07:24:26 +08:00
|
|
|
@c Free Software Foundation, Inc.
|
1999-05-03 15:29:11 +08:00
|
|
|
@c This file is part of the documentation for the GAS manual
|
|
|
|
|
|
|
|
|
|
@c Configuration settings for all-inclusive version of manual
|
|
|
|
|
|
|
|
|
|
@c switches:------------------------------------------------------------
|
|
|
|
|
@c Properties of the manual
|
|
|
|
|
@c ========================
|
|
|
|
|
@c Discuss all architectures?
|
|
|
|
|
@set ALL-ARCH
|
|
|
|
|
@c A generic form of manual (not tailored to specific target)?
|
|
|
|
|
@set GENERIC
|
|
|
|
|
@c Include text on assembler internals?
|
|
|
|
|
@clear INTERNALS
|
|
|
|
|
@c Many object formats supported in this config?
|
|
|
|
|
@set MULTI-OBJ
|
|
|
|
|
|
|
|
|
|
@c Object formats of interest
|
|
|
|
|
@c ==========================
|
|
|
|
|
@set AOUT
|
|
|
|
|
@set COFF
|
|
|
|
|
@set ELF
|
|
|
|
|
@set SOM
|
|
|
|
|
|
|
|
|
|
@c CPUs of interest
|
|
|
|
|
@c ================
|
2002-02-11 07:25:17 +08:00
|
|
|
@set ALPHA
|
1999-05-03 15:29:11 +08:00
|
|
|
@set ARC
|
|
|
|
|
@set ARM
|
2006-06-01 22:54:25 +08:00
|
|
|
@set AVR
|
2005-09-30 23:05:07 +08:00
|
|
|
@set BFIN
|
2007-06-29 22:09:34 +08:00
|
|
|
@set CR16
|
2002-02-09 11:12:24 +08:00
|
|
|
@set CRIS
|
1999-05-03 15:29:11 +08:00
|
|
|
@set D10V
|
|
|
|
|
@set D30V
|
|
|
|
|
@set H8/300
|
1999-09-05 01:29:22 +08:00
|
|
|
@set HPPA
|
2000-02-23 21:52:23 +08:00
|
|
|
@set I370
|
1999-05-03 15:29:11 +08:00
|
|
|
@set I80386
|
2000-08-01 09:57:46 +08:00
|
|
|
@set I860
|
1999-05-03 15:29:11 +08:00
|
|
|
@set I960
|
2005-02-11 14:29:08 +08:00
|
|
|
@set IA64
|
2002-07-19 15:52:40 +08:00
|
|
|
@set IP2K
|
ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* configure.in: Add cases for Renesas m32c.
* configure: Regenerated.
bfd/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for m32c-*-elf (Renesas m32c and m16c).
* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
(ALL_MACHINES_CFILES): Add cpu-m32c.c.
(BFD32_BACKENDS): Add elf32-m32c.lo.
(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
* Makefile.in: Regenerated.
* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
arch and mach codes.
(bfd_m32c_arch): New arch info object.
(bfd_archures_list): List bfd_m32c_arch.
* bfd-in2.h: Regenerated.
* config.bfd: Add case for the m32c.
* configure.in: Add case for the m32c.
* configure: Regenerated.
* cpu-m32c.c, elf32-m32c.c: New files.
* libbfd.h: Regenerated.
* targets.c (bfd_elf32_m32c_vec): Declare.
(_bfd_target_vector): List bfd_elf32_m32c_vec.
binutils/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* readelf.c: #include "elf/m32c.h"
(guess_is_rela, dump_relocations, get_machine_name): Add cases for
EM_M32C.
* Makefile.am (readelf.o): Update dependencies.
* Makefile.in: Regenerated.
cpu/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
gas/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C.
* Makefile.am (CPU_TYPES): List m32c.
(TARGET_CPU_CFILES): List config/tc-m32c.c.
(TARGET_CPU_HFILES): List config/tc-m32c.h.
* configure.in: Add case for m32c.
* configure.tgt: Add cases for m32c and m32c-*-elf.
* configure: Regenerated.
* config/tc-m32c.c, config/tc-m32c.h: New files.
* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set M32C.
* doc/as.texinfo: Add text for the M32C-specific options and line
comment characters, and refer to c-m32c.texi.
* doc/c-m32c.texi: New file.
include/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* dis-asm.h (print_insn_m32c): New declaration.
include/elf/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for Renesas M32C and M16C.
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
ld/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
(eelf32m32c.c): New target.
* Makefile.in: Regenerated.
* configure.tgt: Add case for m32c-*-elf.
* emulparams/elf32m32c.sh: New file.
opcodes/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
* m32c-desc.h, m32c-opc.h: New.
* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
m32c-opc.c.
(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
m32c-ibld.lo, m32c-opc.lo.
(CLEANFILES): List stamp-m32c.
(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
(CGEN_CPUS): Add m32c.
(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
(m32c_opc_h): New variable.
(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
(m32c-opc.lo): New rules.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_m32c_arch.
* configure: Regenerated.
* disassemble.c (ARCH_m32c): New.
[ARCH_m32c]: #include "m32c-desc.h".
(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
(disassemble_init_for_target) [ARCH_m32c]: Same.
* cgen-ops.h, cgen-types.h: New files.
* Makefile.am (HFILES): List them.
* Makefile.in: Regenerated.
2005-07-15 06:52:28 +08:00
|
|
|
@set M32C
|
1999-05-03 15:29:11 +08:00
|
|
|
@set M32R
|
2006-02-17 22:36:28 +08:00
|
|
|
@set xc16x
|
2000-06-19 09:22:44 +08:00
|
|
|
@set M68HC11
|
1999-05-03 15:29:11 +08:00
|
|
|
@set M680X0
|
1999-09-05 01:29:22 +08:00
|
|
|
@set MCORE
|
|
|
|
|
@set MIPS
|
2001-10-30 23:20:14 +08:00
|
|
|
@set MMIX
|
bfd:
Add ms2.
* archures.c (bfd_mach_ms2): Define.
* cpu-ms1.c (arch_info_struct): Add ms2 stanza.
* elf32-ms1.c (elf32_ms1_machine): Add ms2 case.
(ms1_elf_merge_private_bfd_data): Remove unused variables. Add
correct merging logic, with workaround.
(ms1_elf_print_private_bfd_data): Add ms2 case.
* reloc.c (BFD_RELOC_MS1_PCINSN8): Add ms2 specific reloc.
* libbfd.h: Regenerated.
* bfd-in2.h: Regenerated.
cpu:
Add ms2
* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
model.
(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
f-cb2incr, f-rc3): New fields.
(LOOP): New instruction.
(JAL-HAZARD): New hazard.
(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
New operands.
(mul, muli, dbnz, iflush): Enable for ms2
(jal, reti): Has JAL-HAZARD.
(ldctxt, ldfb, stfb): Only ms1.
(fbcb): Only ms1,ms1-003.
(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
fbcbincrs, mfbcbincrs): Enable for ms2.
(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
* ms1.opc (parse_loopsize): New.
(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
(print_pcrel): New.
gas:
Add ms2.
* config/tc-ms1.c (ms1_mach_bitmask): Initialize to MS1.
(ms1_architectures): Add ms2.
(md_parse_option): Add ms2.
(md_show_usage): Add ms2.
(md_assemble): Add JAL_HAZARD detection logic.
(md_cgen_lookup_reloc): Add MS1_OPERAND_LOOPSIZE case.
* doc/c-ms1.texi: New.
* doc/all.texi: Add MS1.
* doc/Makefile.am (CPU_DOCS): Add c-ms1.texi.
* doc/Makefile.in: Rebuilt.
* doc/Makefile: Rebuilt.
gas/testsuite:
Add ms2.
* gas/ms1/allinsn.d: Adjust pcrel disassembly.
* gas/ms1/errors.exp: Fix target triplet.
* gas/ms1/ms1-16-003.d: Adjust pcrel disassembly.
* gas/ms1/ms1-16-003.s: Tweak label.
* gas/ms1/ms1.exp: Adjust target triplet. Add ms2 test.
* gas/ms1/ms2.d, gas/ms1/ms2.s: New.
* gas/ms1/relocs.d: Adjust expected machine name and pcrel
disassembly.
* gas/ms1/relocs.exp: Adjust target triplet.
include:
Add ms2.
* elf/ms1.h (EF_MS1_CPU_MS2): New.
opcodes:
Add ms2.
* ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
ms1-opc.c, ms1-opc.h: Regenerated.
2005-11-08 19:15:13 +08:00
|
|
|
@set MS1
|
2002-12-31 03:25:13 +08:00
|
|
|
@set MSP430
|
2001-02-19 07:33:11 +08:00
|
|
|
@set PDP11
|
1999-09-05 01:29:22 +08:00
|
|
|
@set PJ
|
[gas/ChangeLog]
* config/tc-ppc.c (md_parse_option): New -m7410, -m7450 and -m7455
flags, equivalent to -m7400. New -maltivec to enable AltiVec
instructions. New -mbook64 and -mbooke/-mbooke32 flags to enable
64-bit and 32-bit BookE support, respectively. Change -m403 and
-m405 to set PPC403 option.
(md_show_usage): Adjust for new options.
* doc/all.texi: Set PPC.
* doc/as.texinfo: Add PPC support and pull in c-ppc.texi.
* doc/c-ppc.texi: New file.
* doc/Makefile.am (CPU_DOCS): Add c-ppc.texi.
* doc/Makefile.in: Regenerate.
[gas/testsuite/ChangeLog]
* gas/ppc/booke.s: New test for Motorola BookE.
* gas/ppc/booke.d: New file.
* gas/ppc/ppc.exp: Test booke.s.
[include/opcode/ChangeLog]
* ppc.h (PPC_OPCODE_BOOKE, PPC_OPCODE_403): New opcode flags for
BookE and PowerPC403 instructions.
[opcodes/ChangeLog]
* ppc-opc.c (insert_de, extract_de, insert_des, extract_des): New
instruction field instruction/extraction functions for new BookE
DE form instructions.
(CT): New macro for CT field in an X form instruction.
(DE, DES, DEO, DE_MASK): New macros for DE/DES fields in DE form
instructions.
(PPC64): Don't include PPC_OPCODE_PPC.
(403): New opcode macro for PPC403 processors.
(BOOKE): New opcode macro for BookE processors.
(bce, bcel, bcea, bcela, bclre, bclrel: New BookE instructions.
(bcctre, bcctrel, be, bel, bea, bela, icbt, icbte, lwzxe): Likewise.
(dcbste, lwzuxe, luxe, dcbfe, lbzxe, lwarxe, lbzuxe): Likewise.
(stwcxe, stwxe, stxe, stwuxe, stuxe, stbxe, dcbtste, stbuxe): Likewise.
(mfapidi, dcbte, lhzxe, lhzuxe, lhaxe, lhauxe, subfe64): Likewise.
(subfeo64, adde64, addeo64, sthxe, sthuxe, subfze64): Likewise.
(subfzeo64, addze64, addzeo64, dcbie, subfme64, subfmeo64): Likewise.
(addme64, addmeo64, stdcxe., mcrxr64, lwbrxe, lfsxe, lfsuxe): Likewise.
(lfdxe, lfduxe, stwbrxe, stfsxe, stfsuxe, stfdxe, dcbae): Likewise.
(stfduxe, tlbivax, tlbivaxe, lhbrxe, ldxe, lduxe, tlbsx): Likewise.
(tlbsxe, sthbrxe, stdxe, stduxe, icbie, stfiwxe, dcbze, lbze): Likewise.
(lbzue, ldue, lhze, lhzue, lhae, lhaue, lwze, lwzue): Likewise.
(stbe, stbue, sthe, sthue, stwe, stwue, lfse, lfsue, lfde): Likewise.
(lfdue, stde, stdue, stfse, stfsue, stfde, stfdue): Likewise.
* ppc-dis.c (print_insn_big_powerpc, print_insn_little_powerpc): Look
for a disassembler option of `booke', `booke32' or `booke64' to enable
BookE support in the disassembler.
2001-10-13 09:59:09 +08:00
|
|
|
@set PPC
|
1999-09-05 01:29:22 +08:00
|
|
|
@set SH
|
1999-05-03 15:29:11 +08:00
|
|
|
@set SPARC
|
2003-03-24 23:43:15 +08:00
|
|
|
@set TIC54X
|
1999-09-05 01:29:22 +08:00
|
|
|
@set V850
|
1999-05-03 15:29:11 +08:00
|
|
|
@set VAX
|
2003-04-01 23:50:31 +08:00
|
|
|
@set XTENSA
|
2005-10-26 01:40:19 +08:00
|
|
|
@set Z80
|
1999-09-05 01:29:22 +08:00
|
|
|
@set Z8000
|
1999-05-03 15:29:11 +08:00
|
|
|
|
2006-07-24 21:49:50 +08:00
|
|
|
@c Does this version of the assembler use the difference-table kludge?
|
1999-05-03 15:29:11 +08:00
|
|
|
@set DIFF-TBL-KLUGE
|
|
|
|
|
|
|
|
|
|
@c Do all machines described use IEEE floating point?
|
|
|
|
|
@clear IEEEFLOAT
|
|
|
|
|
|
|
|
|
|
@c Is a word 32 bits, or 16?
|
|
|
|
|
@clear W32
|
|
|
|
|
@set W16
|
|
|
|
|
|
|
|
|
|
@c Do symbols have different characters than usual?
|
|
|
|
|
@clear SPECIAL-SYMS
|
|
|
|
|
|
|
|
|
|
@c strings:------------------------------------------------------------
|
|
|
|
|
@c Name of the assembler:
|
|
|
|
|
@set AS as
|
|
|
|
|
@c Name of C compiler:
|
|
|
|
|
@set GCC gcc
|
|
|
|
|
@c Name of linker:
|
|
|
|
|
@set LD ld
|
|
|
|
|
@c Text for target machine (best not used in generic case; but just in case...)
|
|
|
|
|
@set TARGET machine specific
|
|
|
|
|
@c Name of object format NOT SET in generic version
|
|
|
|
|
@clear OBJ-NAME
|
