binutils-gdb/sim/riscv/configure.ac

dnl Process this file with autoconf to produce a configure script.
AC_INIT(Makefile.in)
AC_CONFIG_MACRO_DIRS([../m4 ../.. ../../config])

# Select the bitsize of the target.
riscv_addr_bitsize=
case "${target}" in
riscv32*) riscv_addr_bitsize=32 ;;
riscv*) riscv_addr_bitsize=64 ;;
esac
SIM_AC_OPTION_BITSIZE($riscv_addr_bitsize)

SIM_AC_OUTPUT
sim: riscv: new port This is a hand-written implementation that should have fairly complete coverage for the base integer instruction set ("i"), and for the atomic ("a") and integer multiplication+division ("m") extensions. It also covers 32-bit & 64-bit targets. The unittest coverage is a bit weak atm, but should get better. 2015-05-21 23:16:45 +08:00			`dnl Process this file with autoconf to produce a configure script.`
			`AC_INIT(Makefile.in)`
sim: common: split up acinclude.m4 into individual m4 files This file is quite large and is getting unmanageable. Split it apart to follow aclocal best practices by putting one-macro-per-file. There shouldn't be any real functional changes here as can be seen in the configure script regens. 2021-02-07 11:51:30 +08:00			`AC_CONFIG_MACRO_DIRS([../m4 ../.. ../../config])`
sim: riscv: new port This is a hand-written implementation that should have fairly complete coverage for the base integer instruction set ("i"), and for the atomic ("a") and integer multiplication+division ("m") extensions. It also covers 32-bit & 64-bit targets. The unittest coverage is a bit weak atm, but should get better. 2015-05-21 23:16:45 +08:00
			`# Select the bitsize of the target.`
			`riscv_addr_bitsize=`
			`case "${target}" in`
			`riscv32*) riscv_addr_bitsize=32 ;;`
			`riscv*) riscv_addr_bitsize=64 ;;`
			`esac`
			`SIM_AC_OPTION_BITSIZE($riscv_addr_bitsize)`

			`SIM_AC_OUTPUT`