binutils-gdb/ld/testsuite/ld-powerpc/aix-glink-1-64.dd

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include/coff/ * xcoff.h (XCOFF_CALLED, XCOFF_IMPORT): Update comments. (XCOFF_WAS_UNDEFINED): New flag. (xcoff_link_hash_table): Add an "rtld" field. bfd/ * coff-rs6000.c (xcoff_ppc_relocate_section): Report relocations against undefined symbols if the symbol's XCOFF_WAS_UNDEFINED flag is set. Assert that all undefined symbols are either imported or defined by a dynamic object. * coff64-rs6000.c (xcoff64_ppc_relocate_section): Likewise. * xcofflink.c (xcoff_link_add_symbols): Extend function-symbol handling to all relocations. Only set XCOFF_CALLED for function symbols. (xcoff_find_function): New function, split out from... (bfd_xcoff_export_symbol) ...here. (xcoff_set_import_path): New function, split out from... (bfd_xcoff_import_symbol): ...here. Remove assertion for old meaning of XCOFF_CALLED. (xcoff_mark_symbol): If we mark an undefined and unimported symbol, find some way of defining it. If the symbol is a function descriptor, fill in its definition automatically. If the symbol is a function, mark its descriptor and allocate room for global linkage code. Otherwise mark the symbol as implicitly imported. Move the code for creating function descriptors from... (xcoff_build_ldsyms): ...here. Use XCOFF_WAS_UNDEFINED to check for symbols that were implicitly defined. (xcoff_mark): Don't count any dynamic relocations against function symbols. (bfd_xcoff_size_dynamic_sections): Save the rtld parameter in the xcoff link info. (xcoff_link_input_bfd): Remove handling of undefined and unexported symbols. ld/ * emultempl/aix.em (gld${EMULATION_NAME}_handle_option): Make -berok and -bernotok control link_info.unresolved_syms_in_objects and link_info.unresolved_syms_in_shared_libs instead of force_make_executable. ld/testsuite/ * ld-powerpc/aix-glink-1.ex, ld-powerpc/aix-glink-1.s, ld-powerpc/aix-glink-1-32.dd, ld-powerpc/aix-glink-1-64.dd, ld-powerpc/aix-glink-1-32.d, ld-powerpc/aix-glink-1-64.d: New tests. * ld-powerpc/aix52.exp: Run them.
2009-03-14 17:17:32 +08:00
.*
Disassembly of section \.text:
0000000010000000 <\.f1>:
10000000: 4e 80 00 20 blr
0000000010000004 <\.f2>:
10000004: 48 00 00 05 bl 10000008 <\.f3>
0000000010000008 <\.f3>:
10000008: 4e 80 00 20 blr
000000001000000c <\.ext>:
1000000c: e9 82 00 00 ld r12,0\(r2\)
10000010: f8 41 00 28 std r2,40\(r1\)
10000014: e8 0c 00 00 ld r0,0\(r12\)
10000018: e8 4c 00 08 ld r2,8\(r12\)
1000001c: 7c 09 03 a6 mtctr r0
10000020: 4e 80 04 20 bctr
10000024: 00 00 00 00 \.long 0x0
10000028: 00 0c a0 00 \.long 0xca000
1000002c: 00 00 00 00 \.long 0x0
10000030: 00 00 00 18 \.long 0x18
Disassembly of section \.data:
0000000020000000 <foo>:
20000000: 20 00 00 08 .*
20000004: 10 00 00 0c .*
0000000020000008 <f1>:
20000008: 00 00 00 00 .*
2000000c: 10 00 00 00 .*
20000010: 00 00 00 00 .*
20000014: 20 00 00 38 .*
\.\.\.
0000000020000020 <f2>:
20000020: 00 00 00 00 .*
20000024: 10 00 00 04 .*
20000028: 00 00 00 00 .*
2000002c: 20 00 00 38 .*
\.\.\.
0000000020000038 <TOC>:
\.\.\.